Datasheet LT8580 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionBoost/SEPIC/Inverting DC/DC Converter with 1A, 65V Switch, Soft-Start and Synchronization
Pages / Page32 / 10 — APPLICATIONS INFORMATION
RevisionB
File Format / SizePDF / 1.4 Mb
Document LanguageEnglish

APPLICATIONS INFORMATION

APPLICATIONS INFORMATION

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APPLICATIONS INFORMATION
an inductor, there are two conditions that limit the mini- Avoiding Subharmonic Oscillations: The LT8580’s internal mum inductance: (1) providing adequate load current, slope compensation circuit can prevent subharmonic oscil- and (2) avoiding subharmonic oscillation. Choose an lations that can occur when the duty cycle is greater than inductance that is high enough to meet both of these 50%, provided that the inductance exceeds a minimum requirements. value. In applications that operate with duty cycles greater Adequate Load Current : Small value inductors result in than 50%, the inductance must be at least: increased ripple currents and thus, due to the limited peak VIN 2  DC − 1 switch current, decrease the average current that can be LMIN >  1.25 • (DC − 300ns • f) • f 1− DC provided to a load (I  OUT). In order to provide adequate load current, L should be at least: LMIN = L1 for boost topologies (see Figure 15) DC • V L L IN MIN = L1 = L2 for coupled dual inductor topologies BOOST > ⎛ |V ⎞ (see Figure 16 and Figure 17) 2(f) I OUT| • IOUT ⎜ LIM − ⎟ ⎝ V L IN • h ⎠ MIN = L1||L2 for uncoupled dual inductor topologies (see Figure 16 and Figure 17) for boost, topologies, or: Maximum Inductance: Excessive inductance can reduce DC • V L IN current ripple to levels that are difficult for the current com- DUAL > ⎛ V ⎞ parator (A3 in the Block Diagram) to cleanly discriminate, 2(f) I OUT • IOUT ⎜ LIM− − IOUT ⎟ thus causing duty cycle jitter and/or poor regulation. The ⎝ V IN • h ⎠ maximum inductance can be calculated by: for the SEPIC and inverting topologies. V DC where: L IN − VCESAT MAX = • IMIN-RIPPLE f L BOOST = L1 for boost topologies (see Figure 15) where LDUAL = L1 = L2 for coupled dual inductor topologies (see Figure 16 and Figure 17) LMIN = L1 for boost topologies (see Figure 15) L LMIN = L1 = L2 for coupled dual inductor topologies DUAL = L1||L2 for uncoupled dual inductor topologies (see Figure 16 and Figure 17) (see Figure 16 and Figure 17) DC = switch duty cycle (see previous section) LMIN = L1||L2 for uncoupled dual inductor topologies (see Figure 16 and Figure 17) ILIM = switch current limit, typically about 1.2A at 50% duty cycle (see the Typical Performance Characteristics IMIN(RIPPLE) = typically 80mA section). Current Rating: Finally, the inductor(s) must have a rating greater than its peak operating current to prevent inductor h = power conversion efficiency (typically 85% for boost and 83% for dual inductor topologies at high currents). saturation resulting in efficiency loss. In steady state, the peak input inductor current (continuous conduction mode f = switching frequency only) is given by: IOUT = maximum load current |VOUT • IOUT| VIN • DC Negative values of L indicate that the output load current I L1-PEAK = + VIN • h 2 • L1• f I OUT exceeds the switch current limit capability of the LT8580. for the boost, SEPIC and dual inductor inverting topologies. Rev. B 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts