Datasheet L6983 (STMicroelectronics) - 4
| Manufacturer | STMicroelectronics |
| Description | 38 V 3A synchronous step-down converter with 17uA quiescent current |
| Pages / Page | 63 / 4 — L6983. Pin configuration. Figure 2. Pin connection (top through view). … |
| File Format / Size | PDF / 5.1 Mb |
| Document Language | English |
L6983. Pin configuration. Figure 2. Pin connection (top through view). Table 1. Pin description. Pin. Symbol. Function. DS13116. Rev 1
Model Line for this Datasheet
Text Version of Document
L6983 Pin configuration 2 Pin configuration Figure 2. Pin connection (top through view)
D D N N W W PG S S PG 1 6 1 5 1 4 1 3 V I N 1 1 2 V I N V I N L D O 2 1 1 B O O T A G N D 3 E . P . 1 0 A G N D EN/CLKIN 4 9 V CC 5 6 7 8 T D U S O OO I A / V W B B PG V F FS
Table 1. Pin description Pin Symbol Function
1 VIN DC input voltage. 2 VINLDO DC input voltage connected to the supply rail with a simple RC filter. 3 AGND Analog ground. Enable pin with internal voltage divider. Pull-down/up to disable/ enable the device. 4 EN / CLKIN In LNM versions, this pin is also used to provide an external clock signal, which synchronizes the device. The PGOOD open collector output is driven to low impedance when 5 PGOOD the output voltage is out of regulation and released once the output voltage becomes valid. Typically connected to the regulated output voltage, an external voltage source can be used to supply part of the analog circuitry to 6 VBIAS reduce current consumptions at light load. Connect it to AGND if not used. This pin operates as VOUT or FB according to the selected part number. In fixed output voltage versions, VOUT is the output voltage 7 FB/VOUT sensing with selected internal voltage divider. In adjustable versions, FB is output voltage sensing with eternal voltage divider. Connect an external resistor to program the oscillator frequency and 8 FSW enable the optional dithering. This pin supplies the embedded analog circuitry. Connect a ceramic 9 VCC capacitor (≥ 1 µF) to filter internal voltage reference. 10 AGND Analog ground. Connect an external capacitor (100 nF typ.) between BOOT and SW 11 BOOT pins. The gate charge required to drive the internal NMOS is refreshed during the low-side switch conduction time.
DS13116
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Rev 1 page 4/63
Document Outline 1 Diagram 2 Pin configuration 3 Typical application circuit 4 Absolute maximum ratings 4.1 ESD protection 4.2 Thermal characteristics 5 Electrical characteristics 5.1 Frequency selection table 6 Functional description 6.1 Enable 6.2 Soft-start 6.3 Undervoltage lockout 6.4 Light-load operation 6.4.1 Low consumption mode (LCM) 6.4.2 Low noise mode (LNM) 6.4.3 Efficiency for low consumption mode and low noise mode part number 6.4.4 Load regulation for low consumption mode and Low noise mode part number 6.5 Switch-over feature 6.6 Spread spectrum 6.7 Overvoltage protection 6.8 Overcurrent protection 6.9 Thermal shutdown 6.10 Power Good 7 Closing the loop 7.1 GCO(s) control to output transfer function 7.2 Error amplifier compensation network 7.3 Voltage divider 8 Application notes 8.1 Programmable power up threshold 8.2 External synchronization (available for low noise mode only) 8.3 Output voltage adjustment 8.4 Switching frequency 8.5 Design of the power components 8.5.1 Input capacitor selection 8.5.2 Inductor selection 8.5.3 Output capacitor selection 9 Application board 10 Efficiency curves 11 Thermal dissipation 12 Package information 12.1 QFN16 (3x3 mm) package information 13 Ordering information Revision history
D D N N W W PG S S PG 1 6 1 5 1 4 1 3 V I N 1 1 2 V I N V I N L D O 2 1 1 B O O T A G N D 3 E . P . 1 0 A G N D EN/CLKIN 4 9 V CC 5 6 7 8 T D U S O OO I A / V W B B PG V F FS
Table 1. Pin description Pin Symbol Function
1 VIN DC input voltage. 2 VINLDO DC input voltage connected to the supply rail with a simple RC filter. 3 AGND Analog ground. Enable pin with internal voltage divider. Pull-down/up to disable/ enable the device. 4 EN / CLKIN In LNM versions, this pin is also used to provide an external clock signal, which synchronizes the device. The PGOOD open collector output is driven to low impedance when 5 PGOOD the output voltage is out of regulation and released once the output voltage becomes valid. Typically connected to the regulated output voltage, an external voltage source can be used to supply part of the analog circuitry to 6 VBIAS reduce current consumptions at light load. Connect it to AGND if not used. This pin operates as VOUT or FB according to the selected part number. In fixed output voltage versions, VOUT is the output voltage 7 FB/VOUT sensing with selected internal voltage divider. In adjustable versions, FB is output voltage sensing with eternal voltage divider. Connect an external resistor to program the oscillator frequency and 8 FSW enable the optional dithering. This pin supplies the embedded analog circuitry. Connect a ceramic 9 VCC capacitor (≥ 1 µF) to filter internal voltage reference. 10 AGND Analog ground. Connect an external capacitor (100 nF typ.) between BOOT and SW 11 BOOT pins. The gate charge required to drive the internal NMOS is refreshed during the low-side switch conduction time.
DS13116
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Rev 1 page 4/63
Document Outline 1 Diagram 2 Pin configuration 3 Typical application circuit 4 Absolute maximum ratings 4.1 ESD protection 4.2 Thermal characteristics 5 Electrical characteristics 5.1 Frequency selection table 6 Functional description 6.1 Enable 6.2 Soft-start 6.3 Undervoltage lockout 6.4 Light-load operation 6.4.1 Low consumption mode (LCM) 6.4.2 Low noise mode (LNM) 6.4.3 Efficiency for low consumption mode and low noise mode part number 6.4.4 Load regulation for low consumption mode and Low noise mode part number 6.5 Switch-over feature 6.6 Spread spectrum 6.7 Overvoltage protection 6.8 Overcurrent protection 6.9 Thermal shutdown 6.10 Power Good 7 Closing the loop 7.1 GCO(s) control to output transfer function 7.2 Error amplifier compensation network 7.3 Voltage divider 8 Application notes 8.1 Programmable power up threshold 8.2 External synchronization (available for low noise mode only) 8.3 Output voltage adjustment 8.4 Switching frequency 8.5 Design of the power components 8.5.1 Input capacitor selection 8.5.2 Inductor selection 8.5.3 Output capacitor selection 9 Application board 10 Efficiency curves 11 Thermal dissipation 12 Package information 12.1 QFN16 (3x3 mm) package information 13 Ordering information Revision history
