Datasheet STSPIN32F0251, STSPIN32F0252 (STMicroelectronics)

STSPIN32F0251, STSPIN32F0252
250 V three-phase controller with MCU
Datasheet
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production data Applications
TQFP 10x10 64L pitch 0.5 Battery operated and 110 Vac supplied power and garden tools Industrial fans and pumps Home appliances Industrial and home automation
Features Description
Three-phase gate drivers The STSPIN32F025x system-in-package is an – High voltage rail up to 250 V extremely integrated solution for driving three- – Driver current capability: phase applications, helping designers to reduce STSPIN32F0251: PCB area and overall bill-of-material. 200/350 mA source/sink current It embeds an STM32F031x6x7 featuring an STSPIN32F0252: ARM® 32-bit Cortex®-M0 CPU and a 250 V triple 1/0.85 A source/sink current half-bridge gate driver, able to drive N-channel – dV/dt transient immunity ±50 V/ns power MOSFETs or IGBTs. – Gate driving voltage range from 9V to 20V A comparator featuring advanced smartSD 32-bit ARM® Cortex®-M0 core: function is integrated, ensuring fast and effective – Up to 48 MHz clock frequency protection against overload and overcurrent. – 4-Kbyte SRAM with HW parity The high-voltage bootstrap diodes are also – 32-Kbyte Flash memory with option bytes integrated, as well as anti cross-conduction, used for write/readout protection deadtime and UVLO protection on both the lower 21 general-purpose I/O ports (GPIO) and upper driving sections, which prevents the power switches from operating in low efficiency or 6 general-purpose timers dangerous conditions. Matched delays between 12-bit ADC converter (up to 10 channels) low and high-side sections guarantee no cycle I2C, USART and SPI interfaces distortion. Matched propagation delay for all channels The integrated MCU allows performing FOC, 6-step sensorless and other advanced driving Integrated bootstrap diodes algorithms including the speed control loop. Comparator for fast over current protection UVLO, Interlocking and deadtime functions
Product label
Smart shutdown (smartSD) function Standby mode for low power consumption On-chip debug support via SWD Extended temperature range: -40 to +125 °C September 2019 DS13048 Rev 2 1/29 This is information on a product in full production. www.st.com Document Outline 1 Block diagram Figure 1. STSPIN32F025x SiP block diagram 2 Pin description and connection diagram Figure 2. STSPIN32F025x pin connection (Top view) Table 1. Legend/abbreviations used in the pin description table Table 2. Pin description Table 3. STSPIN32F025x MCU-Driver internal connections 3 Electrical data 3.1 Absolute maximum ratings Table 4. Absolute maximum ratings 3.2 Thermal data Table 5. Thermal data 3.3 Recommended operating conditions Table 6. Recommended operating conditions 4 Electrical characteristics Table 7. Electrical characteristics Figure 3. Propagation delay timing definition Figure 4. Deadtime timing definitions Figure 5. Deadtime and interlocking waveforms definition 5 Device description 5.1 Gate driver 5.1.1 Inputs and outputs Table 8. Inputs truth table (applicable when device is not in UVLO or SmartSD protection) 5.1.2 Deadtime 5.1.3 VCC UVLO protection Figure 6. VCC power ON and UVLO, LVG timing Figure 7. VCC power ON and UVLO, HVG timing 5.1.4 VBO UVLO protection Figure 8. VBO Power-ON and UVLO timing 5.1.5 Comparator and Smart shutdown Figure 9. Smart shutdown timing waveforms 5.2 Microcontroller unit 5.2.1 Memories and boot mode 5.2.2 Power management 5.2.3 High-speed external clock source Figure 10. Typical application with 8 MHz crystal Figure 11. HSE clock source timing diagram 5.3 Advanced-control timer (TIM1) Table 9. TIM1 channel configuration 6 Package information 6.1 TQFP 10x10 64L package information Figure 12. TQFP mechanical data Table 10. TQFP package dimensions 6.2 Suggested land pattern Figure 13. TQFP 10x10 64L suggested land pattern 7 Ordering information Table 11. Order codes 8 Revision history Table 12. Document revision history