Datasheet LSK489 (Linear Systems)
| Manufacturer | Linear Systems |
| Description | Low Noise Low Capacitance Monolithic Dual N-channel JFET Amplifier |
| Pages / Page | 6 / 1 — LSK489. LOW NOISE LOW CAPACITANCE. MONOLITHIC DUAL. N-CHANNEL JFET … |
| File Format / Size | PDF / 658 Kb |
| Document Language | English |
LSK489. LOW NOISE LOW CAPACITANCE. MONOLITHIC DUAL. N-CHANNEL JFET AMPLIFIER. FEATURES. Features. Benefits. Applications. Description
Model Line for this Datasheet
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LSK489 LOW NOISE LOW CAPACITANCE MONOLITHIC DUAL N-CHANNEL JFET AMPLIFIER FEATURES
ULTRA LOW NOISE en = 1.8nV/√Hz LOW INPUT CAPACITANCE Ciss = 4pF
Features Benefits Applications
Reduced Noise due Tight differential voltage match vs. Wide band differential Amps to process improvement current High speed temperature Monolithic Design Improved op amp speed settling time compensated single ended input High slew rate accuracy amplifier amps Low offset/drift voltage Minimum Input Error trimming error High speed comparators Low gate leakage lgss & lg voltage Impedance Converters High CMRR 102 dB Lower intermodulation distortion
Description
The LSK 489 series of high performance monolithic dual JFETs features extremely low noise, tight offset voltage and low drift over temperature specifications, and is targeted for use in a wide range or precision instrumentation applications. This series has a wide selection of offset and drift specifications. The SST series SO-8 package provided ease of manufacturing and the symmetrical pinout prevents improper orientation. The SO-8 package is available with tape and reel options for compatibility with automatic assembly methods. (See packaging data)
ABSOLUTE MAXIMUM RATINGS1
@ 25 °C (unless otherwise stated)
SOIC-A Maximum Temperatures
Storage Temperature -55 to +150°C Junction Operating Temperature -55 to +150°C
TO-71 Maximum Power Dissipation, TA = 25°C TOP VIEW
Continuous Power Dissipation, per side 4 300mW Power Dissipation, total 5 500mW
Maximum Currents
Gate Forward Current IG(F) = 10mA
SOT-23 Maximum Voltages TOP VIEW
Gate to Source V • GSO = 60V Gate to Drain VGDO = 60V * For equivalent single version, see LSK189 Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201151 05/14/2014 Rev#A30 ECN# LSK489
ULTRA LOW NOISE en = 1.8nV/√Hz LOW INPUT CAPACITANCE Ciss = 4pF
Features Benefits Applications
Reduced Noise due Tight differential voltage match vs. Wide band differential Amps to process improvement current High speed temperature Monolithic Design Improved op amp speed settling time compensated single ended input High slew rate accuracy amplifier amps Low offset/drift voltage Minimum Input Error trimming error High speed comparators Low gate leakage lgss & lg voltage Impedance Converters High CMRR 102 dB Lower intermodulation distortion
Description
The LSK 489 series of high performance monolithic dual JFETs features extremely low noise, tight offset voltage and low drift over temperature specifications, and is targeted for use in a wide range or precision instrumentation applications. This series has a wide selection of offset and drift specifications. The SST series SO-8 package provided ease of manufacturing and the symmetrical pinout prevents improper orientation. The SO-8 package is available with tape and reel options for compatibility with automatic assembly methods. (See packaging data)
ABSOLUTE MAXIMUM RATINGS1
@ 25 °C (unless otherwise stated)
SOIC-A Maximum Temperatures
Storage Temperature -55 to +150°C Junction Operating Temperature -55 to +150°C
TO-71 Maximum Power Dissipation, TA = 25°C TOP VIEW
Continuous Power Dissipation, per side 4 300mW Power Dissipation, total 5 500mW
Maximum Currents
Gate Forward Current IG(F) = 10mA
SOT-23 Maximum Voltages TOP VIEW
Gate to Source V • GSO = 60V Gate to Drain VGDO = 60V * For equivalent single version, see LSK189 Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201151 05/14/2014 Rev#A30 ECN# LSK489
