Datasheet AD1937 (Analog Devices) - 9

ManufacturerAnalog Devices
DescriptionFour ADCs/Eight DACs with PLL, 192 kHz, 24-Bit Codec
Pages / Page36 / 9 — AD1937. TIMING DIAGRAMS. tDBH. DBCLK. tDBL. DLS. DLH. DLRCLK. tDDS. …
RevisionB
File Format / SizePDF / 435 Kb
Document LanguageEnglish

AD1937. TIMING DIAGRAMS. tDBH. DBCLK. tDBL. DLS. DLH. DLRCLK. tDDS. DSDATAx. LEFT-JUSTIFIED. MSB. MSB – 1. MODE. tDDH. I2S-JUSTIFIED. RIGHT-JUSTIFIED

AD1937 TIMING DIAGRAMS tDBH DBCLK tDBL DLS DLH DLRCLK tDDS DSDATAx LEFT-JUSTIFIED MSB MSB – 1 MODE tDDH I2S-JUSTIFIED RIGHT-JUSTIFIED

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AD1937 TIMING DIAGRAMS tDBH DBCLK tDBL t t DLS DLH DLRCLK tDDS DSDATAx LEFT-JUSTIFIED MSB MSB – 1 MODE tDDH tDDS DSDATAx I2S-JUSTIFIED MSB MODE tDDH tDDS tDDS DSDATAx RIGHT-JUSTIFIED MSB LSB MODE
25 0
t
4-
DDH tDDH
41 07 Figure 2. DAC Serial Timing
tABH ABCLK tABL t t ALS ALH ALRCLK tABDD ASDATAx LEFT-JUSTIFIED MODE MSB MSB – 1 tABDD ASDATAx I2S-JUSTIFIED MSB MODE tABDD ASDATAx RIGHT-JUSTIFIED MSB LSB MODE
-026 14 74 0 Figure 3. ADC Serial Timing Rev. B | Page 9 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TEST CONDITIONS ANALOG PERFORMANCE SPECIFICATIONS CRYSTAL OSCILLATOR SPECIFICATIONS DIGITAL SPECIFICATIONS POWER SUPPLY SPECIFICATIONS DIGITAL FILTERS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG-TO-DIGITAL CONVERTERS (ADCs) DIGITAL-TO-ANALOG CONVERTERS (DACs) CLOCK SIGNALS RESET AND POWER-DOWN I2C CONTROL PORT POWER SUPPLY AND VOLTAGE REFERENCE SERIAL DATA PORTS—DATA FORMAT TIME-DIVISION MULTIPLEXED (TDM) MODES DAISY-CHAIN MODE ADDITIONAL MODES CONTROL REGISTERS DEFINITIONS PLL AND CLOCK CONTROL REGISTERS DAC CONTROL REGISTERS ADC CONTROL REGISTERS APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS