Datasheet AD74111 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | Low Cost, Low Power Mono Audio Codec |
| Pages / Page | 20 / 6 — AD74111. PIN CONFIGURATION. DCLK. 16 MCLK. DIN. 15 DVDD1. DFS. 14 DVDD2. … |
| File Format / Size | PDF / 353 Kb |
| Document Language | English |
AD74111. PIN CONFIGURATION. DCLK. 16 MCLK. DIN. 15 DVDD1. DFS. 14 DVDD2. DOUT 4. 13 DGND. TOP VIEW. (NOT TO SCALE). RESET 5. 12 AGND. AVDD 6
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Text Version of Document
AD74111 PIN CONFIGURATION DCLK 1 16 MCLK DIN 2 15 DVDD1 DFS 3 14 DVDD2 AD74111 DOUT 4 13 DGND TOP VIEW (NOT TO SCALE) RESET 5 12 AGND AVDD 6 11 REFCAP CAPN 7 10 CAPP VOUT 8 9 VIN PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic I/O Description
1 DCLK I/O Serial Clock 2 DIN I Serial Data Input. The state of DIN on the rising edge of
RESET
determines the operating mode of the interface. See the Selecting Master or Slave Mode section for more information. 3 DFS I/O Frame Synchronization Signal 4 DOUT O Serial Data Output 5 RESET I Power-Down/Reset Input 6 AVDD Analog 2.5 V Power Supply Connection 7 CAPN ADC Filter Capacitor (Negative) 8 VOUT O DAC Analog Output 9 VIN I ADC Analog Input 10 CAPP ADC Filter Capacitor (Positive) 11 REFCAP I/O Internal Reference Decoupling Capacitor. Can also be used for connection of an external reference. 12 AGND Analog Ground Connection 13 DGND Digital Ground Connection 14 DVDD2 Digital 2.5 V Power Supply Connection (Core) 15 DVDD1 Digital Power Supply Connection (Interface) 16 MCLK I External Master Clock Input –6– REV. 0 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS TEMPERATURE RANGE ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics FUNCTIONAL DESCRIPTION General Description ADC Section ADC, CAPP, and CAPN Pins Peak Readback Decimator Section Input Signal Swing DAC Section Output Signal Swing Low Group Delay Reference Master Clocking Scheme Selecting Sample Rates Resetting the AD74111 Power Supplies and Grounds Accessing the Internal Registers Serial Port Serial Port Operating Modes Mixed Mode Data Mode Data-Word Length Selecting Master or Slave Mode Master Mode Operation Slave Mode Operation OUTLINE DIMENSIONS
1 DCLK I/O Serial Clock 2 DIN I Serial Data Input. The state of DIN on the rising edge of
RESET
determines the operating mode of the interface. See the Selecting Master or Slave Mode section for more information. 3 DFS I/O Frame Synchronization Signal 4 DOUT O Serial Data Output 5 RESET I Power-Down/Reset Input 6 AVDD Analog 2.5 V Power Supply Connection 7 CAPN ADC Filter Capacitor (Negative) 8 VOUT O DAC Analog Output 9 VIN I ADC Analog Input 10 CAPP ADC Filter Capacitor (Positive) 11 REFCAP I/O Internal Reference Decoupling Capacitor. Can also be used for connection of an external reference. 12 AGND Analog Ground Connection 13 DGND Digital Ground Connection 14 DVDD2 Digital 2.5 V Power Supply Connection (Core) 15 DVDD1 Digital Power Supply Connection (Interface) 16 MCLK I External Master Clock Input –6– REV. 0 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS TEMPERATURE RANGE ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics FUNCTIONAL DESCRIPTION General Description ADC Section ADC, CAPP, and CAPN Pins Peak Readback Decimator Section Input Signal Swing DAC Section Output Signal Swing Low Group Delay Reference Master Clocking Scheme Selecting Sample Rates Resetting the AD74111 Power Supplies and Grounds Accessing the Internal Registers Serial Port Serial Port Operating Modes Mixed Mode Data Mode Data-Word Length Selecting Master or Slave Mode Master Mode Operation Slave Mode Operation OUTLINE DIMENSIONS
