Datasheet PI6CG33402C (Diodes)
| Manufacturer | Diodes |
| Description | 3.3V Very-Low Power 4-Output PCIe Clock Generator With On-chip Termination |
| Pages / Page | 24 / 1 — Lead-free Green. PI6CG33402C. 3.3V Very-Low Power 4-Output PCIe Clock … |
| File Format / Size | PDF / 1.7 Mb |
| Document Language | English |
Lead-free Green. PI6CG33402C. 3.3V Very-Low Power 4-Output PCIe Clock Generator With On-chip Termination. Features. Description
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Diodes Incorporated
Lead-free Green PI6CG33402C 3.3V Very-Low Power 4-Output PCIe Clock Generator With On-chip Termination Features Description
Î Î 3.3V Supply Voltage The PI6CG33402C is a four-output very-low power PCIe Gen1/Gen2/ Î Î Crystal/CMOS Input: 25MHz Gen3/ Gen4/ Gen5 clock generator. It uses 25MHz crystal or CMOS Î Î Four Differential Low-Power HCSL Outputs with On-chip Termination reference as an input to generate the 100MHz low-power differ- ential HCSL outputs with on-chip terminations. The on-chip ter- Î Î Default ZOUT = 85Ω mination can save 16 external resistors and make layout easier. Î Î Individual Output Enable An additional buffered reference output is provided to serve as a Î Î Reference CMOS Output low-noise reference for other circuitry. Î Î Programmable Slew Rate and Output Amplitude for each Output It uses Diodes' proprietary PLL design to achieve very-low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 require- Î Î Differential Outputs Blocked until PLL is Locked ments. It also provides various options such as different slew rate Î Î Selectable 0%, -0.25%, or -0.5% Spread on Differential Outputs and amplitude through SMBUS, so users can configure the de- Î Î Strapping pins or SMBus for Configuration vice easily to get the optimized performance for their individual Î Î Differential Output-to-Output Skew <50ps boards. The device also supports selectable spread-spectrum Î Î Very-Low Jitter Outputs options to reduce EMI for various applications. à Differential Cycle-to-Cycle Jitter <50ps à PCIe Gen1/Gen2/Gen3/Gen4/Gen5 Compliant
Block Diagram
à CMOS REFOUT Phase Jitter • < 0.3ps RMS, SSC off • <1.5ps RMS, SSC on REFOUT OE[3:0]# Î Î Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Î Î Halogen and Antimony Free. “Green” Device (Note 3) Q3 XTAL_IN/CLK Î Î For automotive applications requiring specific change control OSC PLL XTAL_OUT (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, SS Q2 and manufactured in IATF 16949 certified facilities), please SCLK contact us or your local Diodes representative. Q1 SDATA SADR CTRL https://www.diodes.com/quality/product-definitions/ SS_SEL_TRI LOGIC Q0 PD# Î Î Packaging (Pb-free & Green): à 32-lead 5mm × 5mm TQFN
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CG33402C www.diodes.com January 2020 Document Number DS42294 Rev 3-2 1 Diodes Incorporated
b P
Diodes Incorporated
Lead-free Green PI6CG33402C 3.3V Very-Low Power 4-Output PCIe Clock Generator With On-chip Termination Features Description
Î Î 3.3V Supply Voltage The PI6CG33402C is a four-output very-low power PCIe Gen1/Gen2/ Î Î Crystal/CMOS Input: 25MHz Gen3/ Gen4/ Gen5 clock generator. It uses 25MHz crystal or CMOS Î Î Four Differential Low-Power HCSL Outputs with On-chip Termination reference as an input to generate the 100MHz low-power differ- ential HCSL outputs with on-chip terminations. The on-chip ter- Î Î Default ZOUT = 85Ω mination can save 16 external resistors and make layout easier. Î Î Individual Output Enable An additional buffered reference output is provided to serve as a Î Î Reference CMOS Output low-noise reference for other circuitry. Î Î Programmable Slew Rate and Output Amplitude for each Output It uses Diodes' proprietary PLL design to achieve very-low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 require- Î Î Differential Outputs Blocked until PLL is Locked ments. It also provides various options such as different slew rate Î Î Selectable 0%, -0.25%, or -0.5% Spread on Differential Outputs and amplitude through SMBUS, so users can configure the de- Î Î Strapping pins or SMBus for Configuration vice easily to get the optimized performance for their individual Î Î Differential Output-to-Output Skew <50ps boards. The device also supports selectable spread-spectrum Î Î Very-Low Jitter Outputs options to reduce EMI for various applications. à Differential Cycle-to-Cycle Jitter <50ps à PCIe Gen1/Gen2/Gen3/Gen4/Gen5 Compliant
Block Diagram
à CMOS REFOUT Phase Jitter • < 0.3ps RMS, SSC off • <1.5ps RMS, SSC on REFOUT OE[3:0]# Î Î Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Î Î Halogen and Antimony Free. “Green” Device (Note 3) Q3 XTAL_IN/CLK Î Î For automotive applications requiring specific change control OSC PLL XTAL_OUT (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, SS Q2 and manufactured in IATF 16949 certified facilities), please SCLK contact us or your local Diodes representative. Q1 SDATA SADR CTRL https://www.diodes.com/quality/product-definitions/ SS_SEL_TRI LOGIC Q0 PD# Î Î Packaging (Pb-free & Green): à 32-lead 5mm × 5mm TQFN
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CG33402C www.diodes.com January 2020 Document Number DS42294 Rev 3-2 1 Diodes Incorporated
