link to page 19 link to page 19 link to page 4 Data SheetADT7312READING DATA CS can be tied to ground, and the serial interface operated in a 3-wire mode. DIN, DOUT, and SCLK are used to communicate A read transaction begins when the master writes the command with the ADT7312 in this mode. byte to the ADT7312 with the read/write bit set to 1. The master then supplies 8 or 16 clock pulses, depending on the addressed For microcontroller interfaces, it is recommended that SCLK register, and the ADT7312 clocks data out of the addressed reg- idle high between data transfers. ister on the DOUT line. Data is clocked out on the first falling RESETTING THE SERIAL INTERFACE edge of SCLK following the command byte. The master ends The serial interface can be reset by writing a series of 1s on the the read transaction by pulling CS high. DIN input. If a Logic 1 is written to the ADT7312 DIN line for Figure 16 shows a read from an 8-bit register, and Figure 17 at least 32 serial clock cycles, the serial interface is reset. This shows a read from a 16-bit register. ensures that the interface can be reset to a known state if the INTERFACING TO DSPs OR MICROCONTROLLERS connection is lost due to a software error or a glitch in the system. A reset returns the serial interface to the state in which it waits The ADT7312 can operate with CS used as a frame synchroniza- for a write to one of the registers in the ADT7312. This operation tion signal. This setup is useful for DSP interfaces. In this case, resets the contents of all registers to their power-on default values. the first bit (MSB) is effectively clocked out by CS because CS Following a reset, the user should allow a delay of 500 μs before normally occurs after the falling edge of SCLK in DSPs. SCLK addressing the serial interface. can continue to run between data transfers, provided that the timing specifications in Table 2 are adhered to. CSSCLK123456789101112131415168-BIT COMMAND BYTE0R/WREGISTER ADDR000DINC7C6C5C4C3C2C1C08-BIT DATA 7 01 DOUTD7D6D5D4D3D2D1D0 1- 79 06 Figure 16. Reading from an 8-Bit Register CSSCLK12345678910111213141516172223248-BIT COMMAND BYTE0R/WREGISTER ADDR000DINC7C6C5C4C3C2C1C016-BIT DATA 8 DOUTD15D14D13D12D11D10D9D8D7D2D1D0 01 1- 79 06 Figure 17. Reading from a 16-Bit Register Rev. A | Page 19 of 24 Document Outline Features Applications General Description Product Highlights Functional Block Diagram Table of Contents Revision History Specifications SPI Timing Specifications Absolute Maximum Ratings ESD Caution Pad Configuration and Function Descriptions Die Bond Pad Coordinates Typical Performance Characteristics Theory of Operation Circuit Description Converter Architecture Normal Mode (Continuous Conversion Mode) One-Shot Mode CT and INT Operation in One-Shot Mode 1 SPS Mode Shutdown Mode Fault Queue Temperature Data Format Temperature Conversion Formulas 16-Bit Temperature Data Format 13-Bit Temperature Data Format 10-Bit Temperature Data Format 9-Bit Temperature Data Format Registers Status Register Configuration Register Temperature Value Register ID Register TCRIT Setpoint Register THYST Setpoint Register THIGH Setpoint Register TLOW Setpoint Register Serial Interface SPI Command Byte Writing Data Reading Data Interfacing to DSPs or Microcontrollers Resetting the Serial Interface INT and CT Outputs Undertemperature and Overtemperature Detection Comparator Mode Interrupt Mode Redundant Critical Generator Applications Information Thermal Response Time Supply Decoupling Powering from a Switching Regulator Temperature Monitoring Quick Guide to Measuring Temperature Outline Dimensions Ordering Guide Automotive Products