Datasheet ADT7411 (Analog Devices) - 5

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Data Sheet ADT7411 Parameter1 Min Typ Max Unit Conditions/Comments
POWER REQUIREMENTS VDD 2.7 5.5 V VDD Settling Time 50 ms VDD settles to within 10% of its final voltage level. IDD (Normal Mode)8 3 mA VDD = 3.3 V, VIH = VDD and VIL = GND. 2.2 3 mA VDD = 5 V, VIH = VDD and VIL = GND. IDD (Power-Down Mode) 10 µA VDD = 3.3 V, VIH = VDD and VIL = GND. 10 µA VDD = 5 V, VIH = VDD and VIL = GND. Power Dissipation 10 mW VDD = 3.3 V. Using normal mode. 33 µW VDD = 3.3 V. Using shutdown mode. 1 See the Terminology section. 2 Round robin is the continuous sequential measurement of the following channels: VDD, internal temperature, external temperature (AIN1, AIN2), AIN3, AIN4, AIN5, AIN6, AIN7, and AIN8. 3 Guaranteed by design and characterization, not production tested. 4 The SDA and SCL timing is measured with the input filters turned on so as to meet the fast-mode I2C specification. Switching off the input filters improves the transfer rate but has a negative effect on the EMC behavior of the part. 5 Guaranteed by design. Not tested in production. 6 The interface is also capable of handling the I2C standard mode rise time specification of 1000 ns. 7 All input signals are specified with tr = tf = 5 ns (10% to 90% of VDD), and timed from a voltage level of 1.6 V. 8 IDD specification is valid for ful -scale analog input voltages. Interface inactive. ADC active. Load currents excluded.
t1 SCL t t t2 5 4 SDA DATA IN t3 SDA DATA OUT t6
002
t7
02882- Figure 2. I2C Bus Timing Diagram
CS t1 t2 t7 SCLK t3 t5 t6 DIN D7 D6 D5 D4 D3 D2 D1 D0 X X X X X X X X t4 t8
003
DOUT X X X X X X X X D7 D6 D5 D4 D3 D2 D1 D0
02882- Figure 3. SPI Bus Timing Diagram
200µA IOL TO OUTPUT 1.6V PIN CL 50pF 200µA I
004
OH
02882- Figure 4. Load Circuit for Access Time and Bus Relinquish Time Rev. C | Page 5 of 36 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Functional Block Diagram Absolute Maximum Ratings ESD Caution Pin Configuration and Functional Descriptions Terminology Typical Performance Characteristics Theory of Operation Power-Up Calibration Conversion Speed Functional Description Analog Inputs Single-Ended Inputs Converter Operation ADC Transfer Function Analog Input ESD Protection AIN Interrupts Functional Description—Measurement Temperature Sensor VDD Monitoring On-Chip Reference Round Robin Measurement Single-Channel Measurement Temperature Measurement Method Internal Temperature Measurement External Temperature Measurement Layout Considerations Temperature Value Format Interrupts ADT7411 Registers Interrupt Status 1 Register (Read-Only) [Address = 00h] Interrupt Status 2 Register (Read-Only) [Address = 01h] Internal Temperature Value/VDD Value Register LSBs (Read-Only) [Address = 03h] External Temperature Value and AIN1 to AIN4 Register LSBs (Read-Only) [Address = 04h] AIN5 to AIN8 Registers LSBs (Read-Only) [Address = 05h] VDD Value Register MSBs (Read-Only) [Address = 06h] Internal Temperature Value Register MSBs (Read-Only) [Address = 07h] External Temperature Value or AIN1 Register MSBs (Read-Only) [Address = 08h] AIN2 Register MSBs (Read) [Address = 09h] AIN3 Register MSBs (Read) [Address = 0Ah] AIN4 Register MSBs (Read) [Address = 0Bh] AIN5 Register MSBs (Read) [Address = 0Ch] AIN6 Register MSBs (Read) [Address = 0Dh] AIN7 Register MSBs (Read) [Address = 0Eh] AIN8 Register MSBs (Read) [Address = 0Fh] Control Configuration 1 Register (Read/Write) [Address = 18h] Control Configuration 2 Register (Read/Write) [Address = 19h] Control Configuration 3 Register (Read/Write) [Address = 1Ah] Interrupt Mask 1 Register (Read/Write) [Address = 1Dh] Interrupt Mask 2 Register (Read/Write) [Address = 1Eh] Internal Temperature Offset Register (Read/Write) [Address = 1Fh] External Temperature Offset Register (Read/Write) [Address = 20h] VDD VHIGH Limit Register (Read/Write) [Address = 23h] VDD VLOW Limit Register (Read/Write) [Address = 24h] Internal THIGH Limit Register (Read/Write) [Address = 25h] Internal TLOW Limit Register (Read/Write) [Address = 26h] External THIGH/AIN1 VHIGH Limit Register (Read/Write) [Address = 27h] External TLOW/AIN1 VLOW Limit Register (Read/Write) [Address = 28h] AIN2 VHIGH Limit Register (Read/Write) [Address = 2Bh] AIN2 VLOW Limit Register (Read/Write) [Address = 2Ch] AIN3 VHIGH Limit Register (Read/Write) [Address = 2Dh] AIN3 VLOW Limit Register (Read/Write) [Address = 2Eh] AIN4 VHIGH Limit Register (Read/Write) [Address = 2Fh] AIN4 VLOW Limit Register (Read/Write) [Address = 30h] AIN5 VHIGH Limit Register (Read/Write) [Address = 31h] AIN5 VLOW Limit Register (Read/Write) [Address = 32h] AIN6 VHIGH Limit Register (Read/Write) [Address = 33h] AIN6 VLOW Limit Register (Read/Write) [Address = 34h] AIN7 VHIGH Limit Register (Read/Write) [Address = 35h] AIN7 VLOW Limit Register (Read/Write) [Address = 36h] AIN8 VHIGH Limit Register (Read/Write) [Address = 37h] AIN8 VLOW Limit Register (Read/Write) [Address = 38h] Device ID Register (Read-Only) [Address = 4Dh] Manufacturer’s ID Register (Read-Only) [Address = 4Eh] Silicon Revision Register (Read-Only) [Address = 4Fh] SPI Lock Status Register (Read-Only) [Address = 7Fh] Serial Interface Serial Interface Selection I2C Serial Interface Writing to the ADT7411 Writing to the Address Pointer Register for a Subsequent Read Writing Data to a Register Reading Data from the ADT7411 SPI Serial Interface Write Operation Read Operation SMBus/SPI INT/INTB SMBus Alert Response Outline Dimensions Ordering Guide