Datasheet LT3797 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Triple Output LED Driver Controller |
| Pages / Page | 36 / 9 — PIN FUNCTIONS (QFN/LQFP) TG1, TG2, TG3 (Pins 14, 33, 35/Pins 13, 30, 32): |
| Revision | C |
| File Format / Size | PDF / 381 Kb |
| Document Language | English |
PIN FUNCTIONS (QFN/LQFP) TG1, TG2, TG3 (Pins 14, 33, 35/Pins 13, 30, 32):
Model Line for this Datasheet
Text Version of Document
LT3797
PIN FUNCTIONS (QFN/LQFP) TG1, TG2, TG3 (Pins 14, 33, 35/Pins 13, 30, 32):
Top
SS1, SS2, SS3 (Pins 20, 27, 41/Pins 18, 25, 37):
Soft- Gate Driver Output Pins for Driving LED Loads Disconnect Start Pins. Each SS pin modulates compensation VC pin P-Channel MOSFETs (PMOSs). One for each channel. An voltage of the respective channel. Each of the soft-start inverted PWM signal drives an external PMOS gate of intervals is set with an external capacitor. the respective converter between VISP and (VISP – 6.5V).
SENSEN1, SENSEN2, SENSEN3 (Pins 21, 26, 42/Pins
Leave TG pins unconnected if not used.
19, 24, 38):
The Negative Current Sense Inputs for the
ISN1, ISN2, ISN3 (Pins 15, 32, 36/Pins 14, 29, 33):
Control Loops. Kelvin connect the SENSEN pin to the neg- Connection Points for the Negative Terminals of the ative terminal of the switch current sense resistor (which Current Feedback Resistors. connects to the GND plane) of the respective converter.
ISP1, ISP2, ISP3 (Pins 16, 31, 37/Pins 15, 28, 34): SENSEP1, SENSEP2, SENSEP3 (Pins 22, 25, 43/Pins 20,
Connection Points for the Positive Terminals of the
23, 39):
The Positive Current Sense Inputs for the Control Current Feedback Resistors. Also serves as positive rails Loops. Kelvin connect the SENSEP pin to the positive for TG pin drivers and the reference point for FBH. terminal of the switch current sense resistor in the source
FBH1, FBH2, FBH3 (Pins 17, 30, 38/Pins 16,
of the external N-channel MOSFET (NMOS) switch of the
27, 35):
Voltage Loop Feedback Pins. The out- respective converter. put feedback voltage VFB is measured between
GATE1, GATE2, GATE3 (Pins 23, 24, 44/Pins 21, 22, 40):
the ISP pin and the FBH pin (absolute value): N-Channel MOSFET Gate Driver Outputs. Switch between VFB = |ISP – FBH|. The FBH pin is intended for constant- INTVCC and GND. Driven to GND during shutdown, fault voltage regulation or for LED protection/open-LED detec- or idle states. tion for each channel. In an open-LED event, the internal
INTV
amplifier with output VC regulates V
CC (Pins 45, 46/Pins 41, 42):
INTVCC pins are the FB to 1.25V (typical) integrated power supply output voltage nodes that provide through the respective converter. If VFB is above the over- supply for control circuits and NMOS gate drivers. The voltage threshold (typical 1.3V), the TG pin of the same two INTV channel is driven high to disconnect the external PMOS to CC pins are internally shorted. Must be bypassed with a 10µF ceramic capacitor placed close to the pins. protect the LEDs from an overvoltage event. Either open- LED or overvoltage event signals a fault condition. Do
SW2 (Pin 47/Pin 43):
Integrated Power Supply Switch not leave the FBH pins open. It requires ISP to be no less Node. Connect this pin to one side of the integrated power than 4.5V to maintain an accurate VFB1 voltage sense. If supply inductor. ISP falls below 4.5V, the voltage regulation is deactivated
BOOST (Pin 48/Pin 44):
Connect this pin to SW1 pin and the ISP-ISN current regulation dominates regardless through a 0.1µF ceramic capacitor. of the |ISP-FBH| value. If not used, connect the FBH pin to the ISP pin of the same channel.
SW1 (Pin 49/Pin 45):
Integrated Power Supply Switch Node. Connect this pin to the other side of the integrated
VC1, VC2, VC3 (Pins 19, 28, 40/Pins 17, 26, 36):
Error power supply inductor, and to the BOOST pin with a 0.1µF Amplifier Compensation Pins. Connect a series RC from ceramic capacitor. each VC pin to GND. In each channel, the VC pin is high impedance when the PWM pin is low, or the CTRL pin is
VIN (Pin 50/Pin 46):
Input Supply Pin. If VIN is over 41V below 150mV. This feature allows the VC pin to store the (typical), the integrated INTVCC power supply is turned demand current state variable for the next PWM or CTRL off. All three channels are also turned off (including pull- high transition. ing the GATE pins to GND and TG pins to ISP) and the soft-starts are reset. Must be locally bypassed with low ESR capacitors placed close to the pin. Rev C For more information www.analog.com 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Revision History Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS (QFN/LQFP) TG1, TG2, TG3 (Pins 14, 33, 35/Pins 13, 30, 32):
Top
SS1, SS2, SS3 (Pins 20, 27, 41/Pins 18, 25, 37):
Soft- Gate Driver Output Pins for Driving LED Loads Disconnect Start Pins. Each SS pin modulates compensation VC pin P-Channel MOSFETs (PMOSs). One for each channel. An voltage of the respective channel. Each of the soft-start inverted PWM signal drives an external PMOS gate of intervals is set with an external capacitor. the respective converter between VISP and (VISP – 6.5V).
SENSEN1, SENSEN2, SENSEN3 (Pins 21, 26, 42/Pins
Leave TG pins unconnected if not used.
19, 24, 38):
The Negative Current Sense Inputs for the
ISN1, ISN2, ISN3 (Pins 15, 32, 36/Pins 14, 29, 33):
Control Loops. Kelvin connect the SENSEN pin to the neg- Connection Points for the Negative Terminals of the ative terminal of the switch current sense resistor (which Current Feedback Resistors. connects to the GND plane) of the respective converter.
ISP1, ISP2, ISP3 (Pins 16, 31, 37/Pins 15, 28, 34): SENSEP1, SENSEP2, SENSEP3 (Pins 22, 25, 43/Pins 20,
Connection Points for the Positive Terminals of the
23, 39):
The Positive Current Sense Inputs for the Control Current Feedback Resistors. Also serves as positive rails Loops. Kelvin connect the SENSEP pin to the positive for TG pin drivers and the reference point for FBH. terminal of the switch current sense resistor in the source
FBH1, FBH2, FBH3 (Pins 17, 30, 38/Pins 16,
of the external N-channel MOSFET (NMOS) switch of the
27, 35):
Voltage Loop Feedback Pins. The out- respective converter. put feedback voltage VFB is measured between
GATE1, GATE2, GATE3 (Pins 23, 24, 44/Pins 21, 22, 40):
the ISP pin and the FBH pin (absolute value): N-Channel MOSFET Gate Driver Outputs. Switch between VFB = |ISP – FBH|. The FBH pin is intended for constant- INTVCC and GND. Driven to GND during shutdown, fault voltage regulation or for LED protection/open-LED detec- or idle states. tion for each channel. In an open-LED event, the internal
INTV
amplifier with output VC regulates V
CC (Pins 45, 46/Pins 41, 42):
INTVCC pins are the FB to 1.25V (typical) integrated power supply output voltage nodes that provide through the respective converter. If VFB is above the over- supply for control circuits and NMOS gate drivers. The voltage threshold (typical 1.3V), the TG pin of the same two INTV channel is driven high to disconnect the external PMOS to CC pins are internally shorted. Must be bypassed with a 10µF ceramic capacitor placed close to the pins. protect the LEDs from an overvoltage event. Either open- LED or overvoltage event signals a fault condition. Do
SW2 (Pin 47/Pin 43):
Integrated Power Supply Switch not leave the FBH pins open. It requires ISP to be no less Node. Connect this pin to one side of the integrated power than 4.5V to maintain an accurate VFB1 voltage sense. If supply inductor. ISP falls below 4.5V, the voltage regulation is deactivated
BOOST (Pin 48/Pin 44):
Connect this pin to SW1 pin and the ISP-ISN current regulation dominates regardless through a 0.1µF ceramic capacitor. of the |ISP-FBH| value. If not used, connect the FBH pin to the ISP pin of the same channel.
SW1 (Pin 49/Pin 45):
Integrated Power Supply Switch Node. Connect this pin to the other side of the integrated
VC1, VC2, VC3 (Pins 19, 28, 40/Pins 17, 26, 36):
Error power supply inductor, and to the BOOST pin with a 0.1µF Amplifier Compensation Pins. Connect a series RC from ceramic capacitor. each VC pin to GND. In each channel, the VC pin is high impedance when the PWM pin is low, or the CTRL pin is
VIN (Pin 50/Pin 46):
Input Supply Pin. If VIN is over 41V below 150mV. This feature allows the VC pin to store the (typical), the integrated INTVCC power supply is turned demand current state variable for the next PWM or CTRL off. All three channels are also turned off (including pull- high transition. ing the GATE pins to GND and TG pins to ISP) and the soft-starts are reset. Must be locally bypassed with low ESR capacitors placed close to the pin. Rev C For more information www.analog.com 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Revision History Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
