Datasheet LTC4070 (Analog Devices) - 13
| Manufacturer | Analog Devices |
| Description | Li-Ion/Polymer Shunt Battery Charger System |
| Pages / Page | 16 / 13 — PACKAGE DESCRIPTION. DDB Package. 8-Lead Plastic DFN (3mm. 2mm) |
| Revision | D |
| File Format / Size | PDF / 562 Kb |
| Document Language | English |
PACKAGE DESCRIPTION. DDB Package. 8-Lead Plastic DFN (3mm. 2mm)
Model Line for this Datasheet
Text Version of Document
LTC4070
PACKAGE DESCRIPTION DDB Package 8-Lead Plastic DFN (3mm
×
2mm)
(Reference LTC DWG # 05-08-1702 Rev C) 0.61 ±0.05 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.20 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 3.00 ±0.10 0.40 ±0.10 R = 0.05 TYP TYP 5 8 2.00 ±0.10 PIN 1 BAR PIN 1 TOP MARK R = 0.20 OR (SEE NOTE 6) 0.56 ±0.05 0.25 × 45° CHAMFER 4 1 (DDB8) DFN 1116 REV C 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 BSC 2.15 ±0.05 0 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev. D For more information www.analog.com 13 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PACKAGE DESCRIPTION DDB Package 8-Lead Plastic DFN (3mm
×
2mm)
(Reference LTC DWG # 05-08-1702 Rev C) 0.61 ±0.05 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.20 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 3.00 ±0.10 0.40 ±0.10 R = 0.05 TYP TYP 5 8 2.00 ±0.10 PIN 1 BAR PIN 1 TOP MARK R = 0.20 OR (SEE NOTE 6) 0.56 ±0.05 0.25 × 45° CHAMFER 4 1 (DDB8) DFN 1116 REV C 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 BSC 2.15 ±0.05 0 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev. D For more information www.analog.com 13 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
