Datasheet LTC6990 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | TimerBlox: Voltage Controlled Silicon Oscillator |
| Pages / Page | 30 / 8 — PIN FUNCTIONS (DCB/S6). V+ (Pin 1/Pin 5):. DIV (Pin 2/Pin 4):. OE (Pin … |
| Revision | D |
| File Format / Size | PDF / 1,000 Kb |
| Document Language | English |
PIN FUNCTIONS (DCB/S6). V+ (Pin 1/Pin 5):. DIV (Pin 2/Pin 4):. OE (Pin 4/Pin 1):. SET (Pin 3/Pin 3):. GND (Pin 5/Pin 2):
Model Line for this Datasheet
- LTC6990CDCB#TRMPBF LTC6990CDCB#TRPBF LTC6990CS6#TRMPBF LTC6990CS6#TRPBF LTC6990HDCB#TRMPBF LTC6990HDCB#TRPBF LTC6990HS6#TRMPBF LTC6990HS6#TRPBF LTC6990HS6#WTRMPBF LTC6990HS6#WTRPBF LTC6990IDCB#TRMPBF LTC6990IDCB#TRPBF LTC6990IS6#TRMPBF LTC6990IS6#TRPBF LTC6990IS6#WTRMPBF LTC6990IS6#WTRPBF LTC6990MPS6#TRMPBF LTC6990MPS6#TRPBF
Text Version of Document
LTC6990
PIN FUNCTIONS (DCB/S6) V+ (Pin 1/Pin 5):
Supply Voltage (2.25V to 5.5V). This Limit the capacitance on the SET pin to less than 10pF supply must be kept free from noise and ripple. It should to minimize jitter and ensure stability. Capacitance less be bypassed directly to the GND pin with a 0.1µF capacitor. than 100pF maintains the stability of the feedback circuit
DIV (Pin 2/Pin 4):
Programmable Divider and Hi-Z Mode regulating the VSET voltage. Input. A V+ referenced A/D converter monitors the DIV V+ pin voltage (VDIV) to determine a 4-bit result (DIVCODE). V OE OUT DIV may be generated by a resistor divider between V+ and GND. Use 1% resistors to ensure an accurate result. LTC6990 V+ The DIV pin and resistors should be shielded from the GND V+ C1 OUT pin or any other traces that have fast edges. Limit 0.1µF R1 the capacitance on the DIV pin to less than 100pF so that SET DIV V 6990 PF R DIV settles quickly. The MSB of DIVCODE (Hi-Z) deter- SET R2 mines the behavior of the output when OE is driven low. If Hi-Z = 0 the output is pulled low when disabled. If Hi-Z = 1 the output is placed in a high impedance condition
OE (Pin 4/Pin 1):
Output Enable. Drive high to enable the when disabled. output driver (Pin 6). Driving OE low disables the output asynchronously, so that the output is immediately forced
SET (Pin 3/Pin 3):
Frequency-Setting Input. The voltage low (Hi-Z = 0) or floated (Hi-Z = 1). When enabled, the on the SET pin (VSET) is regulated to 1V above GND. The output may temporarily remain low to synchronize with amount of current sourced from the SET pin (ISET) pro- the internal oscillator in order to eliminate pulse slivers. grams the master oscillator frequency. The ISET current range is 1.25µA to 40µA. The output oscillation will stop
GND (Pin 5/Pin 2):
Ground. Tie to a low inductance if I ground plane for best performance. SET drops below approximately 500nA. A resistor con- nected between SET and GND is the most accurate way to
OUT (Pin 6/Pin 6):
Oscillator Output. The OUT pin swings set the frequency. For best performance, use a precision from GND to V+ with an output resistance of approximately metal or thin film resistor of 0.5% or better tolerance 30Ω. When driving an LED or other low-impedance load and 50ppm/°C or better temperature coefficient. For lower a series output resistor should be used to limit source/ accuracy applications an inexpensive 1% thick film resis- sink current to 20mA. tor may be used. Rev. D 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS (DCB/S6) V+ (Pin 1/Pin 5):
Supply Voltage (2.25V to 5.5V). This Limit the capacitance on the SET pin to less than 10pF supply must be kept free from noise and ripple. It should to minimize jitter and ensure stability. Capacitance less be bypassed directly to the GND pin with a 0.1µF capacitor. than 100pF maintains the stability of the feedback circuit
DIV (Pin 2/Pin 4):
Programmable Divider and Hi-Z Mode regulating the VSET voltage. Input. A V+ referenced A/D converter monitors the DIV V+ pin voltage (VDIV) to determine a 4-bit result (DIVCODE). V OE OUT DIV may be generated by a resistor divider between V+ and GND. Use 1% resistors to ensure an accurate result. LTC6990 V+ The DIV pin and resistors should be shielded from the GND V+ C1 OUT pin or any other traces that have fast edges. Limit 0.1µF R1 the capacitance on the DIV pin to less than 100pF so that SET DIV V 6990 PF R DIV settles quickly. The MSB of DIVCODE (Hi-Z) deter- SET R2 mines the behavior of the output when OE is driven low. If Hi-Z = 0 the output is pulled low when disabled. If Hi-Z = 1 the output is placed in a high impedance condition
OE (Pin 4/Pin 1):
Output Enable. Drive high to enable the when disabled. output driver (Pin 6). Driving OE low disables the output asynchronously, so that the output is immediately forced
SET (Pin 3/Pin 3):
Frequency-Setting Input. The voltage low (Hi-Z = 0) or floated (Hi-Z = 1). When enabled, the on the SET pin (VSET) is regulated to 1V above GND. The output may temporarily remain low to synchronize with amount of current sourced from the SET pin (ISET) pro- the internal oscillator in order to eliminate pulse slivers. grams the master oscillator frequency. The ISET current range is 1.25µA to 40µA. The output oscillation will stop
GND (Pin 5/Pin 2):
Ground. Tie to a low inductance if I ground plane for best performance. SET drops below approximately 500nA. A resistor con- nected between SET and GND is the most accurate way to
OUT (Pin 6/Pin 6):
Oscillator Output. The OUT pin swings set the frequency. For best performance, use a precision from GND to V+ with an output resistance of approximately metal or thin film resistor of 0.5% or better tolerance 30Ω. When driving an LED or other low-impedance load and 50ppm/°C or better temperature coefficient. For lower a series output resistor should be used to limit source/ accuracy applications an inexpensive 1% thick film resis- sink current to 20mA. tor may be used. Rev. D 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
