Datasheet LTC7060 (Analog Devices) - 9

link to page 9 LTC7060
OPERATION OVERVIEW
The LTC7060 receives a ground-referenced, low volt- TG HIGH VIH(TG) TG HIGH TG LOW age digital PWM signal to drive two N-channel power VIL(TG) TG LOW MOSFETs in a half bridge configuration. The gate of the PWM low side MOSFET is driven high or low, swinging between BGVCC and BGRTN, depending on the state of the PWM BG LOW pin. Similarly, the gate of the high side MOSFET is driven VIL(BG) BG HIGH BG LOW VIH(BG) complimentary to the low side MOSFET, swinging between BG HIGH BST and SW. 7060 F01 Both the low side and high side drivers are floating gate
Figure 1. Three-State PWM Operation
drivers. The unique double floating architecture makes the gate driver outputs robust and less sensitive to ground The hysteresis between the corresponding VIH and VIL noise. The symmetric design allows the half bridge output voltage levels eliminates false triggering due to the noise to be inverting or non-inverting of the input logic. during switch transitions. However, care should be taken to keep noise from coupling into the PWM pin, particularly in high frequency, high voltage applications.
VCC SUPPLY
The thresholds are positioned to allow for a region in VCC is the power supply for the LTC7060’s internal cir- which both BG and TG are low. An internal resistor divider cuitry. An internal 4.5V supply is generated from the VCC sets the PWM pin voltage into this region if the signal supply to bias most of the internal circuits referred to driving the PWM pin goes into a high impedance state. SGND. The VCC pin may be tied to the BGVCC pin if SGND and BGRTN are at the same potential. V The EN pin can also be used to keep both BG and TG low CC is independent of V if the high impedance state is not available from the PWM IN. driving signal. Driving the EN pin low keeps both TG and
INPUT STAGE (PWM, EN)
BG off, and driving the EN pin high enables TG and BG switching based on the PWM input. There is an internal The LTC7060 employs a three-state PWM input with fixed 2MΩ pull-down resistor from the EN pin to SGND, keep- transition thresholds. The relationship between the tran- ing the EN default state low if its input is not driven. sition thresholds and three input states of the LTC7060 is illustrated in Figure 1. When the voltage on PWM is Both three-state PWM and EN pin can be used by the greater than the threshold V controller IC to perform the Discontinuous Conduction IH(TG), TG is pulled up to BST, turning the high side MOSFET on. This MOSFET will stay Mode (DCM) in switching regulator applications. on until PWM falls below VIL(TG). Similarly, when PWM is less than VIH(BG), BG is pulled up to BGVCC, turning the low side MOSFET on. BG will stay high until PWM increases above the threshold VIL(BG). Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications InformatioN Typical Applications Package Description Typical Application Related Parts