Datasheet STB11NM60T4, STP11NM60 (STMicroelectronics) - 3
| Manufacturer | STMicroelectronics |
| Description | N-channel 600 V, 0.4 Ω typ., 11 A, MDmesh II Power MOSFETs in D²PAK and TO-220 |
| Pages / Page | 21 / 3 — STB11NM60T4, STP11NM60. Electrical characteristics. Table 4. On/off … |
| File Format / Size | PDF / 639 Kb |
| Document Language | English |
STB11NM60T4, STP11NM60. Electrical characteristics. Table 4. On/off states. Symbol. Parameter. Test conditions. Min. Typ. Max. Unit
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STB11NM60T4, STP11NM60 Electrical characteristics 2 Electrical characteristics
(TC = 25 °C unless otherwise specified).
Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 250 μA 600 V VGS = 0 V, VDS = 600 V 1 µA IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V, 10 µA TC = 125 °C(1) IGSS Gate-body leakage current VDS = 0 V, VGS = ±30 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 5.5 A 0.4 0.45 Ω 1. Defined by design, not subject to production test.
Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance - 1000 - pF Coss Output capacitance VDS= 25 V, f = 1 MHz, VGS = 0 V - 230 - pF Crss Reverse transfer capacitance - 25 - pF Coss eq. (1) Equivalent output capacitance VDS = 0 V to 480 V, VGS = 0 V - 100 - pF RG Intrinsic gate resistance f = 1 MHz open drain - 1.6 - Ω Qg Total gate charge VDD = 480 V, ID = 11 A, - 30 - nC Q V gs Gate-source charge GS = 0 to 10 V - 10 - nC (see Figure 12. Test circuit for gate Qgd Gate-drain charge charge behavior) - 15 - nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time VDD = 300 V, ID = 5.5 A, - 20 - ns RG = 4.7 Ω, VGS = 10 V (see Figure 11. Test circuit for tr Rise time resistive load switching times and - 20 - ns Figure 16. Switching time waveform) tr(Voff) Off-voltage rise time VDD = 480 V, ID = 11 A, - 6 - ns t R f Fall time G = 4.7 Ω, VGS = 10 V (see - 11 - ns Figure 13. Test circuit for inductive load switching and diode recovery tc Cross-over time times and Figure 16. Switching - 19 - ns time waveform)
DS3653
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Rev 7 page 3/21
Document Outline 1 Electrical ratings 2 Electrical characteristics 2.1 Electrical characteristics (curves) 3 Test circuits 4 Package information 4.1 D²PAK (TO-263) type A package information 4.2 D²PAK packing information 4.3 D²PAK (TO-263) type B package information 4.4 D²PAK type B packing information 4.5 TO-220 type A package information Revision history
STB11NM60T4, STP11NM60 Electrical characteristics 2 Electrical characteristics
(TC = 25 °C unless otherwise specified).
Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 250 μA 600 V VGS = 0 V, VDS = 600 V 1 µA IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V, 10 µA TC = 125 °C(1) IGSS Gate-body leakage current VDS = 0 V, VGS = ±30 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 5.5 A 0.4 0.45 Ω 1. Defined by design, not subject to production test.
Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance - 1000 - pF Coss Output capacitance VDS= 25 V, f = 1 MHz, VGS = 0 V - 230 - pF Crss Reverse transfer capacitance - 25 - pF Coss eq. (1) Equivalent output capacitance VDS = 0 V to 480 V, VGS = 0 V - 100 - pF RG Intrinsic gate resistance f = 1 MHz open drain - 1.6 - Ω Qg Total gate charge VDD = 480 V, ID = 11 A, - 30 - nC Q V gs Gate-source charge GS = 0 to 10 V - 10 - nC (see Figure 12. Test circuit for gate Qgd Gate-drain charge charge behavior) - 15 - nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time VDD = 300 V, ID = 5.5 A, - 20 - ns RG = 4.7 Ω, VGS = 10 V (see Figure 11. Test circuit for tr Rise time resistive load switching times and - 20 - ns Figure 16. Switching time waveform) tr(Voff) Off-voltage rise time VDD = 480 V, ID = 11 A, - 6 - ns t R f Fall time G = 4.7 Ω, VGS = 10 V (see - 11 - ns Figure 13. Test circuit for inductive load switching and diode recovery tc Cross-over time times and Figure 16. Switching - 19 - ns time waveform)
DS3653
-
Rev 7 page 3/21
Document Outline 1 Electrical ratings 2 Electrical characteristics 2.1 Electrical characteristics (curves) 3 Test circuits 4 Package information 4.1 D²PAK (TO-263) type A package information 4.2 D²PAK packing information 4.3 D²PAK (TO-263) type B package information 4.4 D²PAK type B packing information 4.5 TO-220 type A package information Revision history
