Datasheet KSZ8893FQL (Microchip) - 6
| Manufacturer | Microchip |
| Description | Single-Chip 3-Port Switch with Fiber Support |
| Pages / Page | 109 / 6 — KSZ8893FQL. TABLE 2-1:. SIGNALS. Type. Pin. Note. Description. Number. … |
| File Format / Size | PDF / 2.2 Mb |
| Document Language | English |
KSZ8893FQL. TABLE 2-1:. SIGNALS. Type. Pin. Note. Description. Number. Name. 2-1. Port 1 LED indicators (active-low)
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KSZ8893FQL TABLE 2-1: SIGNALS Type Pin Pin Note Description Number Name 2-1 Port 1 LED indicators (active-low)
(applies to all modes of operation, except Repeater Mode) [LEDSEL1, LEDSEL0] — [0,0] Default [0,1] 1 P1LED2 IPU/O P1LED3 — — P1LED2 Link/Activity 100Link/Activity P1LED1 Full-Duplex/Col 10Link/Activity P1LED0 Speed Full-Duplex — [LEDSEL1, LEDSEL0] — [1,0] [1,1] P1LED3 Activity — P1LED2 Link — P1LED1 Full-Duplex/Col — P1LED0 Speed — 2 P1LED1 IPU/O
Link/Act, 100Link/Activity, 10Link/Activity:
Low (link), High (no link), Toggle (transmit/receive activity)
Full-Duplex/Col:
Low (full-duplex), High (half-duplex), Toggles (collision)
Speed:
Low (100BASE-TX), High (10BASE-T)
Full-Duplex:
Low (full-duplex), High (half-duplex)
Activity:
Toggles (transmit/receive activity)
Link:
Low (link), High (no link)
Repeater Mode (only)
DS00003038B-page 6 2019 Microchip Technology Inc. Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Media Conversion 3.2 Physical Layer Transceiver 3.3 MAC and Switch 3.4 Advanced Switch Functions 3.5 Unicast MAC Address Filtering 3.6 Configuration Interface 3.7 Loopback Support 4.0 Register Descriptions 4.1 MII Management (MIIM) Registers 4.2 Register Descriptions 4.3 Register Map: Switch, PHY, TS-1000 Media Converter (8-bit registers) 4.4 Register Descriptions 4.5 Advanced Control Registers (Registers 96-141) 4.6 Static MAC Address Table 4.7 VLAN Table 4.8 Dynamic MAC Address Table 4.9 Management Information Base (MIB) Counters 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Specifications 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MII Timing 7.4 RMII Timing 7.5 SPI Timing 7.6 Auto-Negotiation Timing 7.7 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformers 10.0 Package Outline 10.1 Package Marking Information Appendix A: Data Sheet Revision History The Microchip Web Site Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service
KSZ8893FQL TABLE 2-1: SIGNALS Type Pin Pin Note Description Number Name 2-1 Port 1 LED indicators (active-low)
(applies to all modes of operation, except Repeater Mode) [LEDSEL1, LEDSEL0] — [0,0] Default [0,1] 1 P1LED2 IPU/O P1LED3 — — P1LED2 Link/Activity 100Link/Activity P1LED1 Full-Duplex/Col 10Link/Activity P1LED0 Speed Full-Duplex — [LEDSEL1, LEDSEL0] — [1,0] [1,1] P1LED3 Activity — P1LED2 Link — P1LED1 Full-Duplex/Col — P1LED0 Speed — 2 P1LED1 IPU/O
Link/Act, 100Link/Activity, 10Link/Activity:
Low (link), High (no link), Toggle (transmit/receive activity)
Full-Duplex/Col:
Low (full-duplex), High (half-duplex), Toggles (collision)
Speed:
Low (100BASE-TX), High (10BASE-T)
Full-Duplex:
Low (full-duplex), High (half-duplex)
Activity:
Toggles (transmit/receive activity)
Link:
Low (link), High (no link)
Repeater Mode (only)
DS00003038B-page 6 2019 Microchip Technology Inc. Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Media Conversion 3.2 Physical Layer Transceiver 3.3 MAC and Switch 3.4 Advanced Switch Functions 3.5 Unicast MAC Address Filtering 3.6 Configuration Interface 3.7 Loopback Support 4.0 Register Descriptions 4.1 MII Management (MIIM) Registers 4.2 Register Descriptions 4.3 Register Map: Switch, PHY, TS-1000 Media Converter (8-bit registers) 4.4 Register Descriptions 4.5 Advanced Control Registers (Registers 96-141) 4.6 Static MAC Address Table 4.7 VLAN Table 4.8 Dynamic MAC Address Table 4.9 Management Information Base (MIB) Counters 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Specifications 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MII Timing 7.4 RMII Timing 7.5 SPI Timing 7.6 Auto-Negotiation Timing 7.7 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformers 10.0 Package Outline 10.1 Package Marking Information Appendix A: Data Sheet Revision History The Microchip Web Site Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service
