Datasheet LT8301 (Analog Devices) - 8

LT8301
OPERATION
of the output voltage. The inherent minimum switch cur- the sample-and-hold error amplifier. Meanwhile, the part rent limit and minimum switch-off time are necessary to switches between sleep mode and active mode, thereby guarantee the correct operation of specific applications. reducing the effective quiescent current to improve light As the load gets very light, the LT8301 starts to fold load efficiency. In this condition, the LT8301 operates in back the switching frequency while keeping the mini- low ripple Burst Mode. The 10kHz (typ) minimum switch- mum switch current limit. So the load current is able to ing frequency determines how often the output voltage is decrease while still allowing minimum switch-off time for sampled and also the minimum load requirement.
APPLICATIONS INFORMATION Output Voltage
An internal trimmed reference voltage,VIREF 1.0V, feeds The R to the non-inverting input of the sample-and-hold error FB resistor as depicted in the Block Diagram is the only external resistor used to program the output voltage. amplifier. The relatively high gain in the overall loop The LT8301 operates similar to traditional current mode causes the voltage across RREF resistor to be nearly equal switchers, except in the use of a unique flyback pulse to VIREF. The resulting relationship between VFLBK and sense circuit and a sample-and-hold error amplifier, which VIREF can be expressed as: sample and therefore regulate the isolated output voltage ⎛ VFLBK ⎞ from the flyback pulse. ⎝⎜ RFB ⎠⎟ •RREF = VIREF Operation is as follows: when the power switch M1 turns or off, the SW pin voltage rises above the VIN supply. The amplitude of the flyback pulse, i.e., the difference between ⎛ V ⎞ V IREF the SW pin voltage and V FLBK = IN supply, is given as: ⎝⎜ RREF ⎠⎟ •RFB =IRFB •RFB VFLBK = (VOUT + VF + ISEC • ESR) • NPS VIREF = Internal trimmed reference voltage VF = Output diode forward voltage IRFB = RFB regulation current = 100µA ISEC = Transformer secondary current Combination with the previous VFLBK equation yields an ESR = Total impedance of secondary circuit equation for VOUT, in terms of the RFB resistor, trans- N former turns ratio, and diode forward voltage: PS = Transformer effective primary-to-secondary turns ratio ⎛ R ⎞ V FB The flyback voltage is then converted to a current I OUT = 100µA • RFB by ⎝⎜ NPS ⎠⎟ − VF the flyback pulse sense circuit (M2 and M3). This current IRFB also flows through the internal 10k RREF resistor to
Output Temperature Coefficient
generate a ground-referred voltage. The resulting volt- The first term in the V age feeds to the inverting input of the sample-and-hold OUT equation does not have tem- perature dependence, but the output diode forward volt- error amplifier. Since the sample-and-hold error ampli- age V fier samples the voltage when the secondary current is F has a significant negative temperature coefficient (–1mV/°C to –2mV/°C). Such a negative temperature coef- zero, the (ISEC • ESR) term in the VFLBK equation can be ficient produces approximately 200mV to 300mV voltage assumed to be zero. variation on the output voltage across temperature. Rev. B 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts