Datasheet LTC3722-1, LTC3722-2 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Synchronous Dual Mode Phase Modulated Full Bridge Controllers |
| Pages / Page | 28 / 8 — PIN FUNCTIONS (LTC3722-1/LTC3722-2). OUTC (Pin 19/Pin 19):. GND (Pin … |
| Revision | C |
| File Format / Size | PDF / 607 Kb |
| Document Language | English |
PIN FUNCTIONS (LTC3722-1/LTC3722-2). OUTC (Pin 19/Pin 19):. GND (Pin 23/Pin 23):. OUTB (Pin 20/Pin 20):. OUTA (Pin 21/Pin 21):
Model Line for this Datasheet
Text Version of Document
LTC3722-1/LTC3722-2
PIN FUNCTIONS (LTC3722-1/LTC3722-2) OUTC (Pin 19/Pin 19):
50mA Driver for High Side of the
GND (Pin 23/Pin 23):
All circuits other than the output Full Bridge Active Leg. drivers in the LTC3722 are referenced to GND. Use of a
OUTB (Pin 20/Pin 20):
50mA Driver for Low Side of the ground plane is recommended but not absolutely neces- Full Bridge Passive Leg. sary.
OUTA (Pin 21/Pin 21):
50mA Driver for High Side of the
CT (Pin 24/Pin 24):
Timing Capacitor for the Oscillator. Full Bridge Passive Leg. Use a ±5% or better low ESR ceramic capacitor for best results.
PGND (Pin 22/Pin 22):
Power Ground for the LTC3722. The output drivers of the LTC3722 are referenced to PGND. Connect the ceramic VCC bypass capacitor di- rectly to PGND.
BLOCK DIAGRAM LTC3722-1 Current Mode SYNC Phase-Shift PWM
VCC UVLO VREF CT SYNC SPRG DPRG SBUS 18 12 14 24 1 13 2 10 PDLY VCC UVLO 5V 9 REF AND LDO OSC 10.25V = ON 1.2V 6V = OFF REF GOOD OUTA 21 FB – + SYSTEM 6 UVLO PASSIVE Q 1 = ENABLE DELAY OUTB 0 = DISABLE T + – QB 20 1.2V 5V V ERROR CC GOOD AMPLIFIER R1 COMP 50k – OUTE 4 16 SYNC + RECTIFIER + DRIVE OUTF PHASE LOGIC 650mV R2 15 14.9k MODULATOR – M1 QB R OUTC 20Ω V 19 REF Q S R QB ACTIVE SS 12µA S DELAY OUTD 7 17 SHUTDOWN CURRENT LIMIT ADLY + FAULT 11 LOGIC 650mV – PGND M2 22 SLOPE COMPENSATION CT/R CS 3 BLANK + 5 23 R 300mV – PULSE BY PULSE LEB CURRENT LIMIT GND 372212 BD01 Rev C 8 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Revision History Typical application Related Parts
PIN FUNCTIONS (LTC3722-1/LTC3722-2) OUTC (Pin 19/Pin 19):
50mA Driver for High Side of the
GND (Pin 23/Pin 23):
All circuits other than the output Full Bridge Active Leg. drivers in the LTC3722 are referenced to GND. Use of a
OUTB (Pin 20/Pin 20):
50mA Driver for Low Side of the ground plane is recommended but not absolutely neces- Full Bridge Passive Leg. sary.
OUTA (Pin 21/Pin 21):
50mA Driver for High Side of the
CT (Pin 24/Pin 24):
Timing Capacitor for the Oscillator. Full Bridge Passive Leg. Use a ±5% or better low ESR ceramic capacitor for best results.
PGND (Pin 22/Pin 22):
Power Ground for the LTC3722. The output drivers of the LTC3722 are referenced to PGND. Connect the ceramic VCC bypass capacitor di- rectly to PGND.
BLOCK DIAGRAM LTC3722-1 Current Mode SYNC Phase-Shift PWM
VCC UVLO VREF CT SYNC SPRG DPRG SBUS 18 12 14 24 1 13 2 10 PDLY VCC UVLO 5V 9 REF AND LDO OSC 10.25V = ON 1.2V 6V = OFF REF GOOD OUTA 21 FB – + SYSTEM 6 UVLO PASSIVE Q 1 = ENABLE DELAY OUTB 0 = DISABLE T + – QB 20 1.2V 5V V ERROR CC GOOD AMPLIFIER R1 COMP 50k – OUTE 4 16 SYNC + RECTIFIER + DRIVE OUTF PHASE LOGIC 650mV R2 15 14.9k MODULATOR – M1 QB R OUTC 20Ω V 19 REF Q S R QB ACTIVE SS 12µA S DELAY OUTD 7 17 SHUTDOWN CURRENT LIMIT ADLY + FAULT 11 LOGIC 650mV – PGND M2 22 SLOPE COMPENSATION CT/R CS 3 BLANK + 5 23 R 300mV – PULSE BY PULSE LEB CURRENT LIMIT GND 372212 BD01 Rev C 8 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Revision History Typical application Related Parts
