Datasheet AD74413R (Analog Devices) - 2
| Manufacturer | Analog Devices |
| Description | Quad-Channel, Software Configurable Input and Output |
| Pages / Page | 70 / 2 — AD74413R. Data Sheet. TABLE OF CONTENTS |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
AD74413R. Data Sheet. TABLE OF CONTENTS
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AD74413R Data Sheet TABLE OF CONTENTS
Features .. 1 Digital Input, Loop Powered Mode ... 42 Applications ... 1 Getting Started .. 43 General Description ... 1 Using Channel Functions .. 43 Companion Products ... 1 ADC Functionality ... 44 Product Highlights ... 1 Diagnostics .. 48 Revision History ... 3 DACs .. 49 Functional Block Diagram .. 4 Driving Inductive Loads .. 50 Specifications ... 5 Reset Function .. 50 Voltage Output .. 5 Thermal Alert and Thermal Reset ... 50 Current Output ... 6 Faults and Alerts ... 50 Voltage Input ... 7 Power Supply Monitors ... 50 Current Input Externally Powered and Current Input GPO_x Pins ... 51 Externally Powered with HART ... 8 SPI Interface and Diagnostics ... 51 Current Input Loop Powered .. 9 Board Design and Layout Considerations .. 54 Resistance Measurement ... 9 Applications Information .. 55 Digital Input Logic ... 10 Register Map ... 56 Digital Input Loop Powered .. 11 NOP Register .. 57 ADC Specifications .. 11 Function Setup Register per Channel .. 57 General Specifications ... 13 ADC Configuration Register per Channel ... 57 Timing Characteristics .. 15 Digital Input Configuration Register per Channel .. 58 Absolute Maximum Ratings .. 17 GPO Parallel Data Register ... 59 Thermal Resistance .. 17 GPO Configuration Register per Channel ... 59 ESD Caution .. 17 Output Configuration Register per Channel .. 60 Pin Configuration and Function Descriptions ... 18 DAC Code Register per Channel ... 60 Typical Performance Characteristics ... 21 DAC Clear Code Register per Channel ... 60 Voltage Output .. 21 DAC Active Code Register per Channel ... 61 Current Output ... 23 Digital Input Threshold Register.. 61 Digital Input .. 25 ADC Conversion Control Register .. 61 Resistance Measurement ... 26 Diagnostics Select Register ... 62 Reference ... 27 Digital Output Level Register ... 63 ADC ... 28 ADC Conversion Results Register per Channel .. 64 Supplies .. 29 Diagnostic Results Registers per Diagnostic Channel .. 64 Theory of Operation .. 30 Alert Status Register ... 64 Robust Architecture ... 30 Live Status Register .. 66 Serial Interface .. 30 Alert Mask Register .. 67 DAC Architecture ... 30 Debounced DIN Count Register per Channel ... 67 ADC Overview ... 31 Readback Select Register ... 68 Reference ... 31 Thermal Reset Enable Register ... 68 Power-On State of the AD74413R.. 31 Command Register .. 68 Device Functions .. 31 Scratch or Spare Register ... 69 Rev. 0 | Page 2 of 70 Document Outline Features Applications General Description Companion Products Product Highlights Revision History Functional Block Diagram Specifications Voltage Output Current Output Voltage Input Current Input Externally Powered and Current Input Externally Powered with HART Current Input Loop Powered Resistance Measurement Digital Input Logic Digital Input Loop Powered ADC Specifications General Specifications Timing Characteristics SPI Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Voltage Output Current Output Digital Input Resistance Measurement Reference ADC Supplies Theory of Operation Robust Architecture Serial Interface DAC Architecture ADC Overview Reference Reference Noise Charge Pump Power-On State of the AD74413R Device Functions High Impedance Interpreting ADC Data Voltage Output Mode Voltage Output Short-Circuit Protection Interpreting ADC Data Current Output Mode Current Output Open Circuit Detection Interpreting ADC Data HART Compatibility Voltage Input Mode Selectable 200 kΩ to GND Interpreting ADC Data Thermocouple Measurement Current Input, Externally Powered Mode Short-Circuit Protection Interpreting ADC Data Current Input, Externally Powered with HART Compatibility Mode Current Input, Loop Powered Mode Short-Circuit Protection Interpreting ADC Data Current Input, Loop Powered with HART Compatibility Mode Resistance Measurement (External 2-Wire RTD) Interpreting ADC Data Digital Input Logic Interpreting ADC Data Digital Input Threshold Setting Digital Input Current Sink Debounce Function Debounce Mode 0 (Default) Debounce Mode 1 Digital Input Inverter Digital Input Counter Digital Input, Loop Powered Mode Interpreting ADC Data Getting Started Using Channel Functions Switching Channel Functions ADC Functionality ADC Conversion Rates ADC_RDYb Functionality ADC Output Data Format ADC Noise Diagnostics DACs LDAC Function Clear Code Function Digital Linear Slew Rate Control HART Compliant Slew Driving Inductive Loads Reset Function Thermal Alert and Thermal Reset Faults and Alerts Channel Faults Power Supply Monitors GPO_x Pins SPI Interface and Diagnostics SPI CRC SPI Interface SCLK Count Feature Readback Mode Streaming Mode Auto Readback Board Design and Layout Considerations Applications Information Register Map NOP Register Function Setup Register per Channel ADC Configuration Register per Channel Digital Input Configuration Register per Channel GPO Parallel Data Register GPO Configuration Register per Channel Output Configuration Register per Channel DAC Code Register per Channel DAC Clear Code Register per Channel DAC Active Code Register per Channel Digital Input Threshold Register ADC Conversion Control Register Diagnostics Select Register Digital Output Level Register ADC Conversion Results Register per Channel Diagnostic Results Registers per Diagnostic Channel Alert Status Register Live Status Register Alert Mask Register Debounced DIN Count Register per Channel Readback Select Register Thermal Reset Enable Register Command Register Scratch or Spare Register Silicon Revision Register Outline Dimensions Ordering Guide
AD74413R Data Sheet TABLE OF CONTENTS
Features .. 1 Digital Input, Loop Powered Mode ... 42 Applications ... 1 Getting Started .. 43 General Description ... 1 Using Channel Functions .. 43 Companion Products ... 1 ADC Functionality ... 44 Product Highlights ... 1 Diagnostics .. 48 Revision History ... 3 DACs .. 49 Functional Block Diagram .. 4 Driving Inductive Loads .. 50 Specifications ... 5 Reset Function .. 50 Voltage Output .. 5 Thermal Alert and Thermal Reset ... 50 Current Output ... 6 Faults and Alerts ... 50 Voltage Input ... 7 Power Supply Monitors ... 50 Current Input Externally Powered and Current Input GPO_x Pins ... 51 Externally Powered with HART ... 8 SPI Interface and Diagnostics ... 51 Current Input Loop Powered .. 9 Board Design and Layout Considerations .. 54 Resistance Measurement ... 9 Applications Information .. 55 Digital Input Logic ... 10 Register Map ... 56 Digital Input Loop Powered .. 11 NOP Register .. 57 ADC Specifications .. 11 Function Setup Register per Channel .. 57 General Specifications ... 13 ADC Configuration Register per Channel ... 57 Timing Characteristics .. 15 Digital Input Configuration Register per Channel .. 58 Absolute Maximum Ratings .. 17 GPO Parallel Data Register ... 59 Thermal Resistance .. 17 GPO Configuration Register per Channel ... 59 ESD Caution .. 17 Output Configuration Register per Channel .. 60 Pin Configuration and Function Descriptions ... 18 DAC Code Register per Channel ... 60 Typical Performance Characteristics ... 21 DAC Clear Code Register per Channel ... 60 Voltage Output .. 21 DAC Active Code Register per Channel ... 61 Current Output ... 23 Digital Input Threshold Register.. 61 Digital Input .. 25 ADC Conversion Control Register .. 61 Resistance Measurement ... 26 Diagnostics Select Register ... 62 Reference ... 27 Digital Output Level Register ... 63 ADC ... 28 ADC Conversion Results Register per Channel .. 64 Supplies .. 29 Diagnostic Results Registers per Diagnostic Channel .. 64 Theory of Operation .. 30 Alert Status Register ... 64 Robust Architecture ... 30 Live Status Register .. 66 Serial Interface .. 30 Alert Mask Register .. 67 DAC Architecture ... 30 Debounced DIN Count Register per Channel ... 67 ADC Overview ... 31 Readback Select Register ... 68 Reference ... 31 Thermal Reset Enable Register ... 68 Power-On State of the AD74413R.. 31 Command Register .. 68 Device Functions .. 31 Scratch or Spare Register ... 69 Rev. 0 | Page 2 of 70 Document Outline Features Applications General Description Companion Products Product Highlights Revision History Functional Block Diagram Specifications Voltage Output Current Output Voltage Input Current Input Externally Powered and Current Input Externally Powered with HART Current Input Loop Powered Resistance Measurement Digital Input Logic Digital Input Loop Powered ADC Specifications General Specifications Timing Characteristics SPI Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Voltage Output Current Output Digital Input Resistance Measurement Reference ADC Supplies Theory of Operation Robust Architecture Serial Interface DAC Architecture ADC Overview Reference Reference Noise Charge Pump Power-On State of the AD74413R Device Functions High Impedance Interpreting ADC Data Voltage Output Mode Voltage Output Short-Circuit Protection Interpreting ADC Data Current Output Mode Current Output Open Circuit Detection Interpreting ADC Data HART Compatibility Voltage Input Mode Selectable 200 kΩ to GND Interpreting ADC Data Thermocouple Measurement Current Input, Externally Powered Mode Short-Circuit Protection Interpreting ADC Data Current Input, Externally Powered with HART Compatibility Mode Current Input, Loop Powered Mode Short-Circuit Protection Interpreting ADC Data Current Input, Loop Powered with HART Compatibility Mode Resistance Measurement (External 2-Wire RTD) Interpreting ADC Data Digital Input Logic Interpreting ADC Data Digital Input Threshold Setting Digital Input Current Sink Debounce Function Debounce Mode 0 (Default) Debounce Mode 1 Digital Input Inverter Digital Input Counter Digital Input, Loop Powered Mode Interpreting ADC Data Getting Started Using Channel Functions Switching Channel Functions ADC Functionality ADC Conversion Rates ADC_RDYb Functionality ADC Output Data Format ADC Noise Diagnostics DACs LDAC Function Clear Code Function Digital Linear Slew Rate Control HART Compliant Slew Driving Inductive Loads Reset Function Thermal Alert and Thermal Reset Faults and Alerts Channel Faults Power Supply Monitors GPO_x Pins SPI Interface and Diagnostics SPI CRC SPI Interface SCLK Count Feature Readback Mode Streaming Mode Auto Readback Board Design and Layout Considerations Applications Information Register Map NOP Register Function Setup Register per Channel ADC Configuration Register per Channel Digital Input Configuration Register per Channel GPO Parallel Data Register GPO Configuration Register per Channel Output Configuration Register per Channel DAC Code Register per Channel DAC Clear Code Register per Channel DAC Active Code Register per Channel Digital Input Threshold Register ADC Conversion Control Register Diagnostics Select Register Digital Output Level Register ADC Conversion Results Register per Channel Diagnostic Results Registers per Diagnostic Channel Alert Status Register Live Status Register Alert Mask Register Debounced DIN Count Register per Channel Readback Select Register Thermal Reset Enable Register Command Register Scratch or Spare Register Silicon Revision Register Outline Dimensions Ordering Guide
