link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 Data SheetADAS1000-3/ADAS1000-4ParameterMinTypMaxUnitTest Conditions/Comments RIGHT LEG DRIVE/DRIVEN LEAD Output Voltage Range 0.2 AVDD − 0.2 V RLD_OUT Short-Circuit Current −5 ±2 +5 mA External protection resistor required to meet regulatory patient current limits; output shorted to AVDD/AGND Closed-Loop Gain Range2 25 V/V Slew Rate2 200 mV/ms Input Referred Noise1 8 μV p-p 0.05 Hz to 150 Hz Amplifier GBP2 1.5 MHz DC LEAD-OFF Internal current source, pulls up open ECG pins; programmable in 10 nA steps: 10 nA to 70 nA Lead-Off Current Accuracy ±10 % Of programmed value High Threshold Level1 2.4 V Inputs are compared to threshold levels; if inputs exceed levels, lead-off flag is raised Low Threshold Level1 0.2 V Threshold Accuracy 25 mV AC LEAD-OFF Programmable in 4 steps: 12.5 nA rms, 25 nA rms, 50 nA rms, 100 nA rms Frequency Range 2.039 kHz Fixed frequency Lead-Off Current Accuracy ±10 % Of programmed value, measured into low impedance REFIN Input Range2 1.76 1.8 1.84 V Channel gain scales directly with REFIN Input Current 113 μA Per active ADC 450 675 950 μA Three ECG channels and respiration enabled REFOUT On-chip reference voltage for ADC; not intended to drive other components reference inputs directly, must be buffered externally Output Voltage, VREF 1.785 1.8 1.815 V Reference Tempco1 ±10 ppm/°C Output Impedance2 0.1 Ω Short-Circuit Current1 4.5 mA Short circuit to ground Voltage Noise1 33 μV p-p 0.05 Hz to 150 Hz (ECG band) 17 μV p-p 0.05 Hz to 5 Hz (respiration) CALIBRATION DAC Available on CAL_DAC_IO (output for master, input for slave) DAC Resolution 10 Bits Full-Scale Output Voltage 2.64 2.7 2.76 V No load, nominal FS output is 1.5 × REFOUT Zero-Scale Output Voltage 0.24 0.3 0.36 V No load DNL −1 +1 LSB Output Series Resistance2 10 kΩ Not intended to drive low impedance load, used for slave CAL_DAC_IO configured as an input Input Current ±5 nA When used as an input CALIBRATION DAC TEST TONE Output Voltage 0.9 1 1.1 mV p-p Rides on common-mode voltage, VCM_REF = 1.3 V Square Wave 1 Hz Low Frequency Sine Wave 10 Hz High Frequency Sine Wave 150 Hz SHIELD DRIVER Output Voltage Range 0.3 2.3 V Rides on common-mode voltage (VCM) Gain 1 V/V Offset Voltage −20 +20 mV Short-Circuit Current 15 25 μA Output current limited by internal series resistance Stable Capacitive Load2 10 nF CRYSTAL OSCILLATOR Applied to XTAL1 and XTAL2 Frequency2 8.192 MHz Start-Up Time2 15 ms Internal startup Rev. B | Page 7 of 80 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS NOISE PERFORMANCE TIMING CHARACTERISTICS Standard Serial Interface Secondary Serial Interface (Master Interface for Customer-Based Digital Pace Algorithm) ADAS1000-4 Only ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION OVERVIEW ECG INPUTS—ELECTRODES/LEADS ECG CHANNEL ELECTRODE/LEAD FORMATION AND INPUT STAGE CONFIGURATION Analog Lead Mode and Calculation Digital Lead Mode and Calculation Electrode Mode: Single-Ended Input Electrode Configuration Electrode Mode: Common Electrode A and Common Electrode B Configurations DEFIBRILLATOR PROTECTION ESIS FILTERING ECG PATH INPUT MULTIPLEXING COMMON-MODE SELECTION AND AVERAGING WILSON CENTRAL TERMINAL (WCT) RIGHT LEG DRIVE/REFERENCE DRIVE CALIBRATION DAC GAIN CALIBRATION LEAD-OFF DETECTION DC Lead-Off Detection DC Lead-Off and High Gains AC Lead-Off Detection ADC Out of Range SHIELD DRIVER RESPIRATION (ADAS1000-4 MODEL ONLY) Internal Respiration Capacitors External Respiration Path External Respiration Capacitors Respiration Carrier Frequency EVALUATING RESPIRATION PERFORMANCE PACING ARTIFACT DETECTION FUNCTION (ADAS1000-4 ONLY) Choice of Leads Detection Algorithm Overview Pace Edge Threshold Pace Level Threshold Pace Amplitude Threshold Pace Validation Filters Pace Width Filter BIVENTRICULAR PACERS PACE DETECTION MEASUREMENTS EVALUATING PACE DETECTION PERFORMANCE PACE WIDTH PACE LATENCY PACE DETECTION VIA SECONDARY SERIAL INTERFACE FILTERING VOLTAGE REFERENCE GANG MODE OPERATION Master/Slave Synchronizing Devices Calibration Common Mode Right Leg Drive Sequencing Devices into Gang Mode INTERFACING IN GANG MODE SERIAL INTERFACES STANDARD SERIAL INTERFACE Write Mode Write/Read Data Format Data Frames/Packets Read Mode Serial Clock Rate Data Rate and Skip Mode Data Ready (DRDY) Detecting Missed Conversion Data CRC Word Clocks SECONDARY SERIAL INTERFACE RESET PD FUNCTION SPI OUTPUT FRAME STRUCTURE (ECG AND STATUS DATA) SPI REGISTER DEFINITIONS AND MEMORY MAP CONTROL REGISTERS DETAILS INTERFACE EXAMPLES Example 1: Initialize the Device for ECG Capture and Start Streaming Data Example 2: Enable Respiration and Stream Conversion Data (Applies to ADAS1000-4 Only) Example 3: DC Lead-Off and Stream Conversion Data Example 4: Configure 150 Hz Test Tone Sine Wave on Each ECG Channel and Stream Conversion Data Example 5: Enable Pace Detection and Stream Conversion Data (Applies to ADAS1000-4 Only) Example 6: Writing to Master and Slave Devices and Streaming Conversion Data Slave Configuration (ADAS1000-3) Master Configuration (ADAS1000) SOFTWARE FLOWCHART POWER SUPPLY, GROUNDING, AND DECOUPLING STRATEGY AVDD ADCVDD AND DVDD SUPPLIES UNUSED PINS/PATHS LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE