Datasheet LTM4668 (Analog Devices) - 8

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APPLICATIONS INFORMATION
The typical LTM4668 application circuit is shown in For parallel operation, a single resistor as determined by Figure 17. External component selection is primarily deter- the previous equation is used for RFB and is connected mined by the input voltage, the output voltage and the from a master channel’s FB pin to GND. Tie the FB pins maximum load current. Refer to Table 8 for specific exter- of the slave channels to INTVCC and tie the VOUT pins and nal capacitor requirements for a particular application. the RUN pins together for all channels in parallel. See the Multi-Channel Parallel Operation section.
VIN to VOUT Step-Down Ratios Input Decoupling Capacitors
There are restrictions in the maximum VIN and VOUT step- down ratio that can be achieved for a given input volt- The LTM4668 module should be connected to a low age due to the minimum on-time limits of each regulator AC-impedance DC source. One piece of 4.7µF input channel. The minimum on-time limit imposes a minimum ceramic capacitor is required to be placed on each side of duty cycle of the converter which can be calculated as: the module for RMS ripple current decoupling. Bulk input capacitor is only needed when the input source imped- DMIN = TON(MIN) • fSW ance is compromised by long inductive leads, traces or where T not enough source capacitance. The bulk capacitor can be ON(MIN) is the minimum on-time, 40ns typical for LTM4668. In the rare cases where the minimum duty an electrolytic aluminum capacitor and polymer capacitor. cycle is surpassed, the output voltage wil remain in regu- Without considering the inductor current ripple, the RMS lation, but the switching frequency will decrease from its current of the input capacitor can be estimated as: programmed value. IOUT(MAX) The LTM4668 is able to run at 100% duty cycle opera- ICIN(RMS) = • D • (1− D) tion. As the duty cycle approaches 100%, the LTM4668 η% enters dropout operation. During dropout, the top PMOS where η% is the estimated efficiency of the power module. switch is turned on continuously, and all active circuitry is kept alive.
Output Decoupling Capacitors
Note that additional thermal derating may be applied. See With an optimized high frequency, high bandwidth design, the Thermal Considerations and Output Current Derating only single piece of low ESR output ceramic capacitor section in this data sheet. is required for each regulator channel to achieve low output voltage ripple and very good transient response.
Output Voltage Programming
Additional output filtering may be required by the system The PWM controller has an internal 0.6V reference volt- designer, if further reduction of output ripples or dynamic age. As shown in the Block Diagram, a 60.4k 0.5% internal transient spikes is required. Table 8 shows a matrix of feedback resistor connects each regulator channel V different output voltages and output capacitors to mini- OUT and FB pin together. Adding a resistor R mize the voltage droop and overshoot during a 0.4A load FB from FB pin to GND programs the output voltage: step transient. Multiphase operation will reduce effec- tive output ripple as a function of the number of phases. 60.4k V + RFB Application Note 77 discusses this noise reduction versus OUT = 0.6V • RFB output ripple current cancellation, but the output capaci- tance will be more a function of stability and transient
Table 2. VFB Resistor Table vs Various Output Voltages
response. The LTpowerCAD® design tool is available to
VOUT(V)
0.6 1.0 1.2 1.5 1.8 download online for output ripple, stability and transient
RFB(k)
OPEN 90.9 60.4 40.2 30.1 response analysis and calculating the output ripple reduc- tion as the number of phases implemented increases by N times. Rev. A 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Package Description Revision History Package Photo Design Resources Related Parts