Datasheet LTM4671 (Analog Devices) - 15
| Manufacturer | Analog Devices |
| Description | Quad DC/DC µModule Regulator with Configurable Dual 12A, Dual 5A Output Array |
| Pages / Page | 36 / 15 — APPLICATIONS INFORMATION. VIN TO VOUT STEP-DOWN RATIOS. Table 1. V. FB … |
| Revision | B |
| File Format / Size | PDF / 2.0 Mb |
| Document Language | English |
APPLICATIONS INFORMATION. VIN TO VOUT STEP-DOWN RATIOS. Table 1. V. FB Resistor Table vs Various Output Voltages
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APPLICATIONS INFORMATION
The typical LTM4671 application circuit is shown in Figure For parallel operation of N-channels, tie the VOUT, the FB 30. External component selection is primarily determined pins and VOSNS– pins together but only hooking up one by the input voltage, the output voltage and the maxi- VOSNS+ (VOSNS) pin to the VOUT so that all the parallel- mum load current. Refer to Table 3 for specific external ing channels can share the same error amplifier and same capacitor requirements for a particular application. top 60.4k feedback resistor. See PolyPhase Operation for details.
VIN TO VOUT STEP-DOWN RATIOS Table 1. V
There are restrictions in the maximum V
FB Resistor Table vs Various Output Voltages
IN and VOUT step- V down ratio that can be achieved for a given input voltage OUT(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 R due to the minimum off-time and minimum on-time limits FB(k) OPEN 90.9 60.4 40.2 30.1 19.1 13.3 8.25 of each regulator. The minimum off-time limit imposes a
INPUT DECOUPLING CAPACITORS
maximum duty cycle which can be calculated as: The LTM4671 module should be connected to a low AC- D (MAX) = 1– tOFF(MIN) • fSW impedance DC source. For each 12A regulator channel, where t one piece 22µF input ceramic capacitor is required, for OFF(MIN) is the minimum off-time, 80ns typical for LTM4671, and f each 5A regulator channel, one piece 10µF input ceramic SW is the switching frequency. Conversely, the minimum on-time limit imposes a minimum duty cycle capacitor is required for RMS ripple current decoupling. of the converter which can be calculated as: Bulk input capacitor is only needed when the input source impedance is compromised by long inductive leads, traces D (MIN) = tON(MIN) • fSW or not enough source capacitance. The bulk capacitor can be an electrolytic aluminum capacitor and polymer capacitor. where TON(MIN) is the minimum on-time, 25ns typical for LTM4671. In the rare cases where the minimum duty Without considering the inductor current ripple, the RMS cycle is surpassed, the output voltage will still remain in current of the input capacitor can be estimated as: regulation, but the switching frequency will decrease from I its programmed value. These constraints are shown in I OUT(MAX) CIN(RMS) = • D • (1– D) the Typical Performance Characteristic curve labeled “V η% IN to VOUT Step-Down Ratio.” Note that additional thermal where η% is the estimated efficiency of the power module. derating may be applied. See the Thermal Considerations and Output Current Derating section in this data sheet.
OUTPUT DECOUPLING CAPACITORS OUTPUT VOLTAGE PROGRAMMING
With an optimized high frequency, high bandwidth design, only single piece of low ESR output ceramic capacitor is The PWM controller has an internal 0.6V reference voltage. required for each regulator channel to achieve low output For the 12A channels (CH0, CH3), a 60.4k 0.5% internal voltage ripple and very good transient response. Additional feedback resistor connects each regulator channel VOSNS+ output filtering may be required by the system designer, and FB pin together. Adding a resistor RFB from FB pin to if further reduction of output ripples or dynamic transient VOSNS– programs the output voltage. spikes is required. Table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage For the 5A channels (CH1, CH2), a 60.4k 0.5% internal droop and overshoot during a 25% load step transient. feedback resistor connects each regulator channel VOSNS Multiphase operation will reduce effective output ripple as and FB pin together. Adding a resistor RFB from FB pin to a function of the number of phases. Application Note 77 GND programs the output voltage: discusses this noise reduction versus output ripple cur- 60.4k rent cancellation, but the output capacitance will be more V + RFB OUT = 0.6V • RFB Rev. B For more information www.analog.com 15 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Component BGA Pinout Package Description Revision History Package Photo Related Parts
APPLICATIONS INFORMATION
The typical LTM4671 application circuit is shown in Figure For parallel operation of N-channels, tie the VOUT, the FB 30. External component selection is primarily determined pins and VOSNS– pins together but only hooking up one by the input voltage, the output voltage and the maxi- VOSNS+ (VOSNS) pin to the VOUT so that all the parallel- mum load current. Refer to Table 3 for specific external ing channels can share the same error amplifier and same capacitor requirements for a particular application. top 60.4k feedback resistor. See PolyPhase Operation for details.
VIN TO VOUT STEP-DOWN RATIOS Table 1. V
There are restrictions in the maximum V
FB Resistor Table vs Various Output Voltages
IN and VOUT step- V down ratio that can be achieved for a given input voltage OUT(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 R due to the minimum off-time and minimum on-time limits FB(k) OPEN 90.9 60.4 40.2 30.1 19.1 13.3 8.25 of each regulator. The minimum off-time limit imposes a
INPUT DECOUPLING CAPACITORS
maximum duty cycle which can be calculated as: The LTM4671 module should be connected to a low AC- D (MAX) = 1– tOFF(MIN) • fSW impedance DC source. For each 12A regulator channel, where t one piece 22µF input ceramic capacitor is required, for OFF(MIN) is the minimum off-time, 80ns typical for LTM4671, and f each 5A regulator channel, one piece 10µF input ceramic SW is the switching frequency. Conversely, the minimum on-time limit imposes a minimum duty cycle capacitor is required for RMS ripple current decoupling. of the converter which can be calculated as: Bulk input capacitor is only needed when the input source impedance is compromised by long inductive leads, traces D (MIN) = tON(MIN) • fSW or not enough source capacitance. The bulk capacitor can be an electrolytic aluminum capacitor and polymer capacitor. where TON(MIN) is the minimum on-time, 25ns typical for LTM4671. In the rare cases where the minimum duty Without considering the inductor current ripple, the RMS cycle is surpassed, the output voltage will still remain in current of the input capacitor can be estimated as: regulation, but the switching frequency will decrease from I its programmed value. These constraints are shown in I OUT(MAX) CIN(RMS) = • D • (1– D) the Typical Performance Characteristic curve labeled “V η% IN to VOUT Step-Down Ratio.” Note that additional thermal where η% is the estimated efficiency of the power module. derating may be applied. See the Thermal Considerations and Output Current Derating section in this data sheet.
OUTPUT DECOUPLING CAPACITORS OUTPUT VOLTAGE PROGRAMMING
With an optimized high frequency, high bandwidth design, only single piece of low ESR output ceramic capacitor is The PWM controller has an internal 0.6V reference voltage. required for each regulator channel to achieve low output For the 12A channels (CH0, CH3), a 60.4k 0.5% internal voltage ripple and very good transient response. Additional feedback resistor connects each regulator channel VOSNS+ output filtering may be required by the system designer, and FB pin together. Adding a resistor RFB from FB pin to if further reduction of output ripples or dynamic transient VOSNS– programs the output voltage. spikes is required. Table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage For the 5A channels (CH1, CH2), a 60.4k 0.5% internal droop and overshoot during a 25% load step transient. feedback resistor connects each regulator channel VOSNS Multiphase operation will reduce effective output ripple as and FB pin together. Adding a resistor RFB from FB pin to a function of the number of phases. Application Note 77 GND programs the output voltage: discusses this noise reduction versus output ripple cur- 60.4k rent cancellation, but the output capacitance will be more V + RFB OUT = 0.6V • RFB Rev. B For more information www.analog.com 15 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Component BGA Pinout Package Description Revision History Package Photo Related Parts
