Datasheet LTM4680 (Analog Devices) - 19

ManufacturerAnalog Devices
DescriptionDual 30A or Single 60A µModule Regulator with Digital Power System Management
Pages / Page126 / 19 — SIMPLIFIED BLOCK DIAGRAM. Figure 2. Simplified LTM4680 Block Diagram
RevisionB
File Format / SizePDF / 7.0 Mb
Document LanguageEnglish

SIMPLIFIED BLOCK DIAGRAM. Figure 2. Simplified LTM4680 Block Diagram

SIMPLIFIED BLOCK DIAGRAM Figure 2 Simplified LTM4680 Block Diagram

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LTM4680
SIMPLIFIED BLOCK DIAGRAM
RSENSE + C C IN1 IN2 2.2µF IN– IN+ SVIN VIN0 INTVCC EXTVCC VDD33 VIN1 1Ω 1µF 2.2µF 2.2µF 1µF + – 1µF A = N INPUT CURRENT/ICHIP (READ_IIN, MFR_READ_IIN_PEAK TO ANALOG SW0 READBACK) SW1 VOUT0 ADJ MT1 MT0 VOUT1 ADJ TO 3.3V TO 3.3V UP TO 30A 330nH V 330nH OUT0 VOUT1 UP TO 30A POWER CONTROL ANALOG SECTION COUT2 COUT1 2.2µF 2.2µF GND MB0 C MB1 OUT3 COUT4 GND 0.01µF SGND DIE TEMP SENSE TSNS1 0.01µF TSNS0b TSNS0 TSNS1b I TO ANALOG TO ANALOG OUT0 CURRENT SENSE IOUT0 CURRENT SENSE READBACK READBACK TSNS0a TSNS1a TEMP MUX V + OSNS0 V + OSNS1 + LOAD0 CLOAD0 REMOTE SENSE X1 X1 ALL ANALOG REMOTE SENSE CLOAD1 LOAD1 V – OSNS0 READBACK SIGNALS V – OSNS1 – PROG GM PROG GM + 10:1 MUX + COMP0b EA0 COMP1b – –EA1 6.8pF 6.8pF C PROG RCOMP PROG R COMPH COMP CCOMPH COMP0a ADC COMP1a CCOMPL CCOMPL PGOOD0 PGOOD1 SPI SLAVE 3.3V SYNC TOLERANT PULL-UP POWER CONTROL DIGITAL SECTION NOT SHOWN SCL VDD25 2.5V SDA 2.2µF ALERT 5.5V-TOLERANT SPI MASTER WP PULL-UP NOT ROM SYNC DRIVER ASEL SHOWN FSWPH_CFG RUN0 RAM DIGITAL ENGINE 32MHz OSC VTRIM0_CFG RUN1 CONFIG RESISTORS FAULT0 VTRIM1_CFG TO 2.5V SGND NOT SHOWN EEPROM 3.3V-TOLERANT VOUT0_CFG FAULT1 PULL-UP NOT SHOWN SHARE_CLK VOUT1_CFG 4680 F02
Figure 2. Simplified LTM4680 Block Diagram DECOUPLING REQUIREMENTS TA = 25°C. Using Test Circuit 1 configuration. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CINH External High Frequency Input Capacitor Requirement IOUT0 = 30A 100 µF (5.75V ≤ VIN ≤ 16V, VOUTn Commanded to 1.000V) IOUT1 = 30A 100 µF COUTn External High Frequency Output Capacitor Requirement IOUT0 = 30A 800 µF (5.75V ≤ VIN ≤ 16V, VOUTn Commanded to 1.000V) IOUT1 = 30A 800 µF Rev. B For more information www.analog.com 19 Document Outline Features Applications Typical Application Description Table of Contents Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins Table 1. VOUTn_CFG Pin Strapping Look-Up Table for the LTM4680’s Output Voltage, Coarse Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 2. VTRIMn_CFG Pin Strapping Look-Up Table for the LTM4680’s Output Voltage, Fine Adjustment Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 3. FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4680’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 4. ASEL Pin Strapping Look-Up Table to Set the LTM4680’s Slave Address (Applicable Regardless of MFR_CONFIG_ALL[6] Setting) Table 5. LTM4680 MFR_ADDRESS Command Examples Expressed in 7- and 8-Bit Addressing Fault Detection and Handling Status Registers and ALERT Masking Figure 5. LTM4680 Status Register Summary Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Table 6. Abbreviations of Supported Data Formats Figure 6. PMBus Timing Diagram Figures 7 to 24 PMBus Protocols PMBus Command Summary PMBus Commands Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations Are Detailed in Table 8) Table 8. Data Format Abbreviations Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase Configuration Connecting The USB to I2C/SMBus/PMBus Controller to the LTM4680 In System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Tables 10 thru 11: Output Current Derating Table 12. Channel Output Voltage vs Capacitor Selection, All Ceramic Configuration, 15A to 30A Load Step with 15A/µs Slew Rate Table 13. Channel Output Voltage vs Capacitor Selection, Bulk and Ceramic Cap Configuration, 15A to 30A Load Step with 15A/µs Slew Rate Table 14. Dual Phase Single Output Voltage vs Capacitor Selection, Bulk and Ceramic Cap Configuration, 30A to 60A Load Step with 30A/µs Slew Rate Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature Power Stage DCR Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage Fault Responses Output Current Fault Responses IC Temperature Fault Responses External Temperature Fault Sharing Fault Sharing Propagation Fault Sharing Response Scratchpad Identification Fault Warning and Status Telemetry NVM Memory Commands Store/Restore Fault Logging Block Memory Write/Read Package Description Table 23. LTM4680 BGA Pinout Revision History Package Photograph Design Resources Related Parts