Datasheet LTM4653 (Analog Devices) - 4

ManufacturerAnalog Devices
DescriptionEN55022B Compliant 58V, 4A Step-Down DC/DC µModule Regulator
Pages / Page34 / 4 — ELECTRICAL CHARACTERISTICS The. denotes the specifications which apply …
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ELECTRICAL CHARACTERISTICS The. denotes the specifications which apply over the specified internal

ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the specified internal

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LTM4653
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified internal operating temperature range (Note 2). TA = 25°C, Test Circuit, VIN = SVIN = 48V, EXTVCC = 24V, RUN = 3.3V, RISET = 480k, RfSET = 57.6kΩ, fSW = 1.5MHz (CLKIN driven with 1.2MHz clock signal) unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VRUN RUN Turn-On/-Off Thresholds RUN Input Turn-On Threshold, RUN Rising l 1.08 1.2 1.32 V RUN Hysteresis 130 mV IRUN RUN Leakage Current RUN = 3.3V l 0.1 50 nA
Oscillator and Phase-Locked Loop (PLL)
fOSC Oscillator Frequency Accuracy VIN = 12V, ISETa = 5V, and: fSET Open Circuit l 360 400 440 kHz RfSET = 57.6kΩ (See fs Specification) 1.95 MHz fSYNC PLL Synchronization Capture Range VIN = 12V, ISETa = 5V, CLKIN Driven with a GND- Referred Clock Toggling from 0.4V to 1.2V and Having a Clock Duty Cycle: From 10% to 90%; fSET Open Circuit 250 550 kHz From 40% to 60%; RfSET = 57.6kΩ 1.3 3 MHz VCLKIN CLKIN Input Threshold VCLKIN Rising 1.2 V VCLKIN Falling 0.4 V ICLKIN CLKIN Input Current VCLKIN = 5V 230 500 μA VCLKIN = 0V –20 –5 μA
Power Good Feedback Input and Power Good Output
OVPGDFB Output Overvoltage PGOOD Upper PGDFB Rising l 620 645 675 mV Threshold UVPGDFB Output Undervoltage PGOOD Lower PGDFB Falling l 525 555 580 mV Threshold ∆VPGDFB PGOOD Hysteresis PGDFB Returning 8 mV RPGDFB Resistor Between PGDFB and SGND 4.94 4.99 5.04 kΩ RPGOOD PGOOD Pull-Down Resistance VPGOOD = 0.1V, VPGDFB < UVPGDFB or 700 1500 Ω VPGDFB > OVPGDFB IPGOOD(LEAK) PGOOD Leakage Current VPGOOD = 3.3V, UVPGDFB < VPGDFB < OVPGDFB 0.1 1 μA tPGOOD(DELAY) PGOOD Delay PGOOD Low to High (Note 4) 16/fSW(HZ) s PGOOD High to Low (Note 4) 64/fSW(HZ) s
Current Monitor and Input Voltage Regulation Pins
hIMONa IOUT/IIMONa Ratio of VOUT Output Current to IIMONa Current, IOUT = 4A l 36 40 44 k IOS(IMON) IMONa Offset Current IIMONa at IOUT = 0A –5 5 µA IMONb Resistor Resistor Between IMONb and SGND 9.8 10 10.2 kΩ VIMONa IMONa Servo Voltage IMONa Voltage During Output Current Regulation l 1.9 2.0 2.1 V VVINREG VINREG Servo Voltage VINREG Voltage During Output Current Regulation l 1.8 2.0 2.2 V IVINREG VINREG Leakage Current VINREG = 2V 1 nA
INTV
CC
Regulator
VINTVCC Channel Internal VCC Voltage, No 3.6V ≤ SVIN ≤ 58V, EXTVCC = Open Circuit 3.15 3.4 3.65 V INTVCC Loading (IINTVCC = 0mA) 5V ≤ SVIN ≤ 58V, 3.2V ≤ EXTVCC ≤ 26.5V 2.85 3.0 3.15 V VEXTVCC(TH) EXTVCC Switchover Voltage (Note 4) 3.15 V ∆VINTVCC(LOAD)/ INTVCC Load Regulation 0mA ≤ IINTVCC ≤ 30mA –2 0.5 2 % VINTVCC Rev. A 4 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Test Circuit Decoupling Requirements Operation Operation Operation Applications Information Typical Applications Package Photograph Package Description Typical Application Related Parts