Datasheet LTM4653 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | EN55022B Compliant 58V, 4A Step-Down DC/DC µModule Regulator |
| Pages / Page | 34 / 9 — PIN FUNCTIONS PGOOD (D1):. COMPb (E1):. PGDFB (D2):. VINREG (D3):. SET … |
| Revision | A |
| File Format / Size | PDF / 3.5 Mb |
| Document Language | English |
PIN FUNCTIONS PGOOD (D1):. COMPb (E1):. PGDFB (D2):. VINREG (D3):. SET (E3):. IMONa (C2):. CLKIN (B1):. COMPa (E2):
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PIN FUNCTIONS PGOOD (D1):
Power Good Indicator, Open-Drain Output applying default loop compensation. Loop compensation Pin. PGOOD is high impedance when PGDFB is within (a series resistor-capacitor) can be applied externally to approximately ±7.5% of 0.6V. PGOOD is pulled to GND COMPa if desired or needed, instead. (See COMPb.) when PGDFB is outside this range.
COMPb (E1):
Internal Loop Compensation Network. For
PGDFB (D2):
Power Good Feedback Programming Pin. most applications, the internal, default loop compen- Connect PGDFB to VOSNS through a resistor, RPGDFB. sation of the LTM4653 is suitable to apply “as is”, and RPGDFB configures the voltage threshold of VOUT for which yields very satisfactory results: apply the default loop PGOOD toggles its state. If the PGOOD feature is used, compensation to the control loop by simply connecting set RPGDFB to: COMPa to COMPb. When more specialized applications require a personal touch to the optimization of control ⎛ V ⎞ R OUT PGDFB = ⎜ – 1⎟ • 4.99k loop response, this can be accomplished by connecting a ⎝ 0.6V ⎠ series resistor-capacitor network from COMPa to SGND— otherwise, leave PGDFB open circuit. and leaving COMPb open circuit. A small filter capacitor (220pF) internal to the LTM4653
VINREG (D3):
Input Voltage Regulation Programming on this pin provides high frequency noise immunity for Pin. Optional y connect this pin to the midpoint node the PGOOD output indicator. formed by a resistor-divider between VD and SGND. When
f
the voltage on VINREG falls below approximately 2V, a
SET (E3):
Oscillator Frequency Programming Pin. The default switching frequency of the LTM4653 is 400kHz. VINREG control loop servos VOUT to decrease the power Often, it is necessary to increase the programmed fre- inductor current and thus regulate VINREG at 2V. (See quency by connecting a resistor between f the Applications Information section.) SET and SGND. (See the Applications Information section.) Note that the If this input voltage regulation feature is not desired, con- synchronization range of CLKIN is approximately ±40% nect VINREG to INTVCC. of the oscillator frequency programmed by the fSET pin.
IMONa (C2):
Power Inductor Current Analog Indicator Pin
CLKIN (B1):
Mode Select and Oscillator Synchronization and Current Limit Programming Pin. The current flowing Input. Leave CLKIN open circuit for forced continuous out of this pin is equal to 1/40,000 of the average power mode operation. Alternatively, this pin can be driven to inductor current. To construct a voltage (VIMONa) that is synchronize the switching frequency of the LTM4653 to proportional to the power inductor current, optionally a clock signal. In this condition, the LTM4653 operates apply a parallel resistor-capacitor network to this pin and in forced continuous mode and the cycle-by-cycle turn- terminate it to SGND. on of the primary power MOSFET MT is coincident with IMONa can be connected to IMONb if the default resis- the rising edge of the clock applied to CLKIN. Note the tor-capacitor termination network provided by IMONb is synchronization range of CLKIN is approximately ±40% desired: 1V at full scale (4A) load current. (See IMONb.) of the oscillator frequency programmed by the fSET pin. If this analog indicator feature is not desired, connect (See the Applications Information section.) IMONa to SGND.
COMPa (E2):
Current Control Threshold and Error If IMONa ever exceeds a trip threshold of approximately Amplifier Compensation Node. The trip threshold of 2V, an IMON control loop servos V LTM4653’s current comparator increases with a corre- OUT to decrease power inductor current and thus regulate IMONa at 2V. In this sponding rise in COMPa voltage. A small filter cap (10pF) manner, the average current limit inception threshold of internal to the LTM4653 on this pin introduces a high- the LTM4653 can be configured. (See the Applications frequency roll-off of the error-amplifier response, yielding Information section.) good noise rejection in the control-loop. COMPa is often electrically connected to COMPb in one’s application, thus Rev. A For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Test Circuit Decoupling Requirements Operation Operation Operation Applications Information Typical Applications Package Photograph Package Description Typical Application Related Parts
PIN FUNCTIONS PGOOD (D1):
Power Good Indicator, Open-Drain Output applying default loop compensation. Loop compensation Pin. PGOOD is high impedance when PGDFB is within (a series resistor-capacitor) can be applied externally to approximately ±7.5% of 0.6V. PGOOD is pulled to GND COMPa if desired or needed, instead. (See COMPb.) when PGDFB is outside this range.
COMPb (E1):
Internal Loop Compensation Network. For
PGDFB (D2):
Power Good Feedback Programming Pin. most applications, the internal, default loop compen- Connect PGDFB to VOSNS through a resistor, RPGDFB. sation of the LTM4653 is suitable to apply “as is”, and RPGDFB configures the voltage threshold of VOUT for which yields very satisfactory results: apply the default loop PGOOD toggles its state. If the PGOOD feature is used, compensation to the control loop by simply connecting set RPGDFB to: COMPa to COMPb. When more specialized applications require a personal touch to the optimization of control ⎛ V ⎞ R OUT PGDFB = ⎜ – 1⎟ • 4.99k loop response, this can be accomplished by connecting a ⎝ 0.6V ⎠ series resistor-capacitor network from COMPa to SGND— otherwise, leave PGDFB open circuit. and leaving COMPb open circuit. A small filter capacitor (220pF) internal to the LTM4653
VINREG (D3):
Input Voltage Regulation Programming on this pin provides high frequency noise immunity for Pin. Optional y connect this pin to the midpoint node the PGOOD output indicator. formed by a resistor-divider between VD and SGND. When
f
the voltage on VINREG falls below approximately 2V, a
SET (E3):
Oscillator Frequency Programming Pin. The default switching frequency of the LTM4653 is 400kHz. VINREG control loop servos VOUT to decrease the power Often, it is necessary to increase the programmed fre- inductor current and thus regulate VINREG at 2V. (See quency by connecting a resistor between f the Applications Information section.) SET and SGND. (See the Applications Information section.) Note that the If this input voltage regulation feature is not desired, con- synchronization range of CLKIN is approximately ±40% nect VINREG to INTVCC. of the oscillator frequency programmed by the fSET pin.
IMONa (C2):
Power Inductor Current Analog Indicator Pin
CLKIN (B1):
Mode Select and Oscillator Synchronization and Current Limit Programming Pin. The current flowing Input. Leave CLKIN open circuit for forced continuous out of this pin is equal to 1/40,000 of the average power mode operation. Alternatively, this pin can be driven to inductor current. To construct a voltage (VIMONa) that is synchronize the switching frequency of the LTM4653 to proportional to the power inductor current, optionally a clock signal. In this condition, the LTM4653 operates apply a parallel resistor-capacitor network to this pin and in forced continuous mode and the cycle-by-cycle turn- terminate it to SGND. on of the primary power MOSFET MT is coincident with IMONa can be connected to IMONb if the default resis- the rising edge of the clock applied to CLKIN. Note the tor-capacitor termination network provided by IMONb is synchronization range of CLKIN is approximately ±40% desired: 1V at full scale (4A) load current. (See IMONb.) of the oscillator frequency programmed by the fSET pin. If this analog indicator feature is not desired, connect (See the Applications Information section.) IMONa to SGND.
COMPa (E2):
Current Control Threshold and Error If IMONa ever exceeds a trip threshold of approximately Amplifier Compensation Node. The trip threshold of 2V, an IMON control loop servos V LTM4653’s current comparator increases with a corre- OUT to decrease power inductor current and thus regulate IMONa at 2V. In this sponding rise in COMPa voltage. A small filter cap (10pF) manner, the average current limit inception threshold of internal to the LTM4653 on this pin introduces a high- the LTM4653 can be configured. (See the Applications frequency roll-off of the error-amplifier response, yielding Information section.) good noise rejection in the control-loop. COMPa is often electrically connected to COMPb in one’s application, thus Rev. A For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Test Circuit Decoupling Requirements Operation Operation Operation Applications Information Typical Applications Package Photograph Package Description Typical Application Related Parts
