Datasheet LTM4643 (Analog Devices) - 6

ManufacturerAnalog Devices
DescriptionUltrathin Quad μModule Regulator with Configurable 3A Output Array
Pages / Page32 / 6 — PIN FUNCTIONS. PACKAGE ROW AND COLUMN LABELING MAY VARY. SVIN1, SVIN2, …
RevisionD
File Format / SizePDF / 2.3 Mb
Document LanguageEnglish

PIN FUNCTIONS. PACKAGE ROW AND COLUMN LABELING MAY VARY. SVIN1, SVIN2, SVIN, SVIN4 (B5, E5, H5, L5):

PIN FUNCTIONS PACKAGE ROW AND COLUMN LABELING MAY VARY SVIN1, SVIN2, SVIN, SVIN4 (B5, E5, H5, L5):

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link to page 10 link to page 10 link to page 10 LTM4643
PIN FUNCTIONS PACKAGE ROW AND COLUMN LABELING MAY VARY SVIN1, SVIN2, SVIN, SVIN4 (B5, E5, H5, L5):
Signal VIN.
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
Filtered input voltage to the internal 3.3V regulator for
LAYOUT CAREFULLY.
the control circuitry of each Switching mode Regulator
VOUT1 (A1, A2, A3), VOUT2 (C1, D1, D2), VOUT3 (F1,
Channel. Tie this pin to the VIN pin respectively in most
G1, G2), VOUT4 (J1, K1, K2):
Power Output Pins of Each applications. Connect SVIN to an external voltage supply Switching Mode Regulator Channel. Apply output load of at least 4V which must also be greater than VOUT. between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins
TRACK/SS1, TRACK/SS2, TRACK/SS3, TRACK/SS4 (A6,
and GND pins. See the Applications Information section
D6, G6, K6):
Output Tracking and Soft-Start Pin of Each for paralleling outputs. Switching Mode Regulator Channel. Allows the user to control the rise time of the output voltage. Putting a volt-
GND (A4-A5, B1-B2, C5, D3-D5, E1-E2, F5, G3-G5,
age below 0.6V on this pin bypasses the internal reference
H1-H2, J5, K3-K4, L1-L2):
Power Ground Pins for Both input to the error amplifier, instead it servos the FB pin Input and Output Returns. Use large PCB copper areas to to match the TRACK voltage. Above 0.6V, the tracking connect all GND together. function stops and the internal reference resumes control
V
of the error amplifier. There’s an internal 2.5µA pull-up
IN1 (B3, B4), VIN2 (E3, E4), VIN3 (H3, H4), VIN4 (L3, L4):
Power input pins connect to the drain of the internal top current from INTVCC on this pin, so putting a capacitor MOSFET for each switching mode regulator channel. here provides soft-start function. Apply input voltages between these pins and GND pins.
MODE1, MODE2, MODE3, MODE4 (B6, E6, H6, L6):
Recommend placing input decoupling capacitance directly Operation Mode Select for Each Switching Mode Regula- between each of VIN pins and GND pins. tor Channel. Tie this pin to INTVCC to force continuous
PGOOD1, PGOOD2, PGOOD3, PGOOD4 (C3, C2, F2,
synchronous operation at all output loads. Tying it to
J2):
Output Power Good with Open-Drain Logic of Each SGND enables discontinuous current mode operation at Switching Mode Regulator Channel. PGOOD is pulled to light loads. Do not leave floating. ground when the voltage on the FB pin is not within ±10%
RUN1, RUN2, RUN3, RUN4 (C6, F6, J6, K7):
Run Control of the internal 0.6V reference. Input of Each Switching Mode Regulator Channel. Enable
CLKOUT (J3):
Output Clock Signal for PolyPhase® Opera- regulator operation by tying the specific RUN pin above tion of the Module. The phase of CLKOUT with respect to 1.2V. Pulling it below 1.1V shuts down the respective CLKIN is set to 180°. CLKOUT’s peak-to-peak amplitude is regulator channel. Do not leave floating. INTVCC to GND. See the Applications Information section
FB1, FB2, FB3, FB4 (A7, D7, G7, J7):
The Negative Input for details. Strictly output; do not drive this pin. CLKOUT of the Error Amplifier for Each Switching Mode Regulator is only active when RUN4 is enabled. Channel. Internally, this pin is connected to VOUT of each
INTV
channel with a 60.4kΩ precision resistor. Different output
CC1, INTVCC2, INTVCC3, INTVCC4 (C4, F4, J4, K5):
Internal 3.3V Regulator Output of Each Switching Mode voltages can be programmed with an additional resistor Regulator Channel. The internal power drivers and con- between the FB and GND pins. In PolyPhase operation, trol circuits are powered from this voltage. Each pin is tying the FB pins together allows for parallel operation. internally decoupled to GND with 1µF low ESR ceramic See the Applications Information section for details. capacitor already. Rev D 6 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Related Parts