Datasheet PI4IOE5V9554 (Diodes) - 8
| Manufacturer | Diodes |
| Description | 2 8-bit I C-Bus and SMBus I/O Port with Interrupt |
| Pages / Page | 17 / 8 — PI4IOE5V9554/9554A. iii. Register 1: Output Port Register. not. iv. … |
| File Format / Size | PDF / 887 Kb |
| Document Language | English |
PI4IOE5V9554/9554A. iii. Register 1: Output Port Register. not. iv. Register 2: Polarity Inversion Register
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Text Version of Document
PI4IOE5V9554/9554A iii. Register 1: Output Port Register
This register reflects the outgoing logic levels of the pins defined as outputs by Register 3.Bit values in this register have no effect on pins defined as inputs. Reads from this register return the value that is in the flip-flop controlling the output selection—
not
the actual pin value. Table 7: Output Port Register Bit 7 6 5 4 3 2 1 0 Symbol O7 O6 O5 O4 O3 O2 O1 O0 Default 1 1 1 1 1 1 1 1
iv. Register 2: Polarity Inversion Register
This register al ows the user to invert the polarity of the input port register data. If a bit in this register is set (written with ‘1’), the corresponding input port data is inverted. If a bit in this register is cleared (written with a ‘0’), the input port data polarity is retained. Table 8: Polarity Inversion Register Bit 7 6 5 4 3 2 1 0 Symbol N7 N6 N5 N4 N3 N2 N1 N0 Default 0 0 0 0 0 0 0 0
v. Register 3: Configuration Register
This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs with a weak pullup to VCC. Table 9: Configuration Register Bit 7 6 5 4 3 2 1 0 Symbol C7 C6 C5 C4 C3 C2 C1 C0 Default 1 1 1 1 1 1 1 1 PI4IOE5V9554/ PI4IOE5V9554A
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November 2019 Document Number DS40769 Rev 3 - 2 8 © Diodes Incorporated Document Outline — Supply Voltage fSCL = 400kHz Supply Current — VI = GND fSCL = 0kHz I/O = inputs Standby Current VI = VCC fSCL = 0kHz I/O = inputs Power-on Reset Voltage[1]
This register reflects the outgoing logic levels of the pins defined as outputs by Register 3.Bit values in this register have no effect on pins defined as inputs. Reads from this register return the value that is in the flip-flop controlling the output selection—
not
the actual pin value. Table 7: Output Port Register Bit 7 6 5 4 3 2 1 0 Symbol O7 O6 O5 O4 O3 O2 O1 O0 Default 1 1 1 1 1 1 1 1
iv. Register 2: Polarity Inversion Register
This register al ows the user to invert the polarity of the input port register data. If a bit in this register is set (written with ‘1’), the corresponding input port data is inverted. If a bit in this register is cleared (written with a ‘0’), the input port data polarity is retained. Table 8: Polarity Inversion Register Bit 7 6 5 4 3 2 1 0 Symbol N7 N6 N5 N4 N3 N2 N1 N0 Default 0 0 0 0 0 0 0 0
v. Register 3: Configuration Register
This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs with a weak pullup to VCC. Table 9: Configuration Register Bit 7 6 5 4 3 2 1 0 Symbol C7 C6 C5 C4 C3 C2 C1 C0 Default 1 1 1 1 1 1 1 1 PI4IOE5V9554/ PI4IOE5V9554A
www.diodes.com
November 2019 Document Number DS40769 Rev 3 - 2 8 © Diodes Incorporated Document Outline — Supply Voltage fSCL = 400kHz Supply Current — VI = GND fSCL = 0kHz I/O = inputs Standby Current VI = VCC fSCL = 0kHz I/O = inputs Power-on Reset Voltage[1]
