link to page 7 link to page 8 link to page 8 link to page 8 link to page 7 link to page 8 link to page 8 link to page 8 link to page 7 link to page 8 DS28E18 1-Wire® to I2C/SPI Bridge with Command Sequencer Electrical Characteristics (continued) (Limits are 100% tested at TA = +25°C and TA = +85°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Specifications marked GBD are guaranteed by design and not production tested. Specifications to the minimum operating temperature are guaranteed by design and are not production tested. ) PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS Start Hold Time tHD:STA 4 Bus Free Time Between t STOP and START BUF 4.7 μs Fall Time tF 30 ns Capacitive Load for C Each Bus Line B I2C mode (Note 1, Note 24) 400 pF I2C MASTER (FAST MODE) (Note 22) SCL Clock Frequency fSCL 400 kHz SCK High Time tHIGH 0.6 μs SCK Low Time tLOW 1.3 μs Start Setup Time tSU:STA 0.6 μs Stop Setup Time tSU:STO 0.6 μs Data Setup Time tSU:DAT 100 ns Data Hold Time tHD:DAT (Note 23) 0 μs Start Hold Time tHD:STA 0.6 μs Bus Free Time Between t STOP and START BUF 1.3 μs Fall Time tF 30 ns Capacitive Load for C Each Bus Line B I2C mode (Note 1, Note 24) 400 pF I2C MASTER (FAST-MODE PLUS) (Note 22) SCL Clock Frequency fSCL 1 MHz SCK High Time tHIGH 0.26 μs SCK Low Time tLOW 0.5 μs Start Setup Time tSU:STA 0.26 μs Stop Setup Time tSU:STO 0.26 μs Data Setup Time tSU:DAT 50 ns Data Hold Time tHD:DAT (Note 23) 0 μs Start Hold Time tHD:STA 0.26 μs Bus Free Time Between t STOP and START BUF 0.5 μs Fall Time tF 30 ns Capacitive Load for C Each Bus Line B (Note 1, Note 24) 550 pF 19-100832 www.maximintegrated.com Maxim Integrated | 6 Document Outline General Description Applications Benefits and Features Simplified Application Block Diagram Absolute Maximum Ratings Package Information 8 TDFN-EP Electrical Characteristics Electrical Characteristics (continued) Typical Operating Characteristics Pin Configuration DS28E18 Pin Description Functional Diagram Block Diagram Detailed Description 64-Bit ROM ID Power-Up ROM ID Serialization 1-Wire Bus System Hardware Configuration Transaction Sequence Initialization 1-Wire ROM Function Commands Search ROM [F0h] Read ROM [33h] Match ROM [55h] Skip ROM [CCh] Resume [A5h] Overdrive-Skip ROM [3Ch] Overdrive-Match ROM [69h] 1-Wire Signaling and Timing Read/Write Time Slots Master-to-Slave Slave-to-Master Improved Network Behavior Device Function Commands Command Start (66h) Write Sequencer Command (11h) Read Sequencer Command (22h) Run Sequencer Command (33h) Device Configuration and Status Commands Write Configuration Command (55h) Read Configuration Command (6Ah) Write GPIO Configuration (83h) Read GPIO Configuration (7Ch) Device Status Command (7Ah) Sequencer Commands I2C Sequencer Interface Commands I2C Start Command I2C Stop Command I2C Write Data Command I2C Read Data Command I2C Read Data with NACK End Command SPI Sequencer Commands SPI Write/Read Byte(s) Command SPI Write/Read Bit(s) Command SS_HIGH Command SS_LOW Command Sequencer Utility Commands GPIO_CTRL Write Command GPIO_CTRL Read Command GPIO_BUF Write Command GPIO_BUF Read Command Delay Command SENS_VDD On Command SENS_VDD Off Command I2C Overview I2C Definitions Bus Idle or Not Busy START Condition STOP Condition Repeated START Condition Data Valid SPI Overview SPI Timing SPI Timing Diagram Power-Up of GPIO/I2C Pins Timeout Typical Application Circuits DS28E18 Configured as an I2C Master Typical Application Circuits (continued) DS28E18 Configured as an SPI Master Ordering Information Revision History