Datasheet ADP7182 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | –28 V, −200 mA, Low Noise, Linear Regulator |
| Pages / Page | 32 / 6 — ADP7182. Data Sheet. ABSOLUTE MAXIMUM RATINGS. Table 3. Parameter Rating. … |
| Revision | M |
| File Format / Size | PDF / 964 Kb |
| Document Language | English |
ADP7182. Data Sheet. ABSOLUTE MAXIMUM RATINGS. Table 3. Parameter Rating. THERMAL DATA. THERMAL RESISTANCE
Model Line for this Datasheet
Text Version of Document
ADP7182 Data Sheet ABSOLUTE MAXIMUM RATINGS
In applications where high maximum power dissipation exists,
Table 3.
close attention to thermal board design is required. The value of
Parameter Rating
θJA can vary, depending on PCB material, layout, and environ- VIN to GND +0.3 V to −30 V mental conditions. The specified values of θJA are based on a VOUT to GND 0.3 V to VIN 4-layer, 4 in. × 3 in. circuit board. See JESD51-7 and JESD51-9 for EN to GND 5 V to VIN detailed information on the board construction. For additional EN to VIN +30 V to −0.3 V information, see the AN-617 Application Note, MicroCSP™ ADJ to GND +0.3 V to VOUT Wafer Level Chip Scale Package. Storage Temperature Range −65°C to +150°C Ψ Operating Junction Temperature Range −40°C to +125°C JB is the junction-to-board thermal characterization parameter with units of °C/W. Ψ Operating Ambient Temperature Range −40°C to +85°C JB of the package is based on modeling and calculation using a 4-layer board. The JESD51-12, Guidelines for Soldering Conditions JEDEC J-STD-020 Reporting and Using Electronic Package Thermal Information, states that thermal characterization parameters are not the same as Stresses at or above those listed under Absolute Maximum thermal resistances. ΨJB measures the component power flowing Ratings may cause permanent damage to the product. This is a through multiple thermal paths rather than a single path as in stress rating only; functional operation of the product at these thermal resistance, θJB. Therefore, ΨJB thermal paths include or any other conditions above those indicated in the operational convection from the top of the package as well as radiation from section of this specification is not implied. Operation beyond the package, factors that make ΨJB more useful in real-world the maximum operating conditions for extended periods may applications. Maximum junction temperature is calculated from affect product reliability. the board temperature (TB) and power dissipation using the
THERMAL DATA
formula Absolute maximum ratings apply individually only, not in TJ = TB + (PD × ΨJB) combination. The ADP7182 can be damaged when the junction See JESD51-8 and JESD51-12 for more detailed information temperature limits are exceeded. Monitoring ambient temperature about ΨJB. does not guarantee that junction temperature (TJ) is within the specified temperature limits. In applications with high power
THERMAL RESISTANCE
dissipation and poor thermal resistance, the maximum ambient θJA, θJC, and ΨJB are specified for the worst-case conditions, that is, a temperature may have to be derated. device soldered in a circuit board for surface-mount packages. In applications with moderate power dissipation and low printed
Table 4. Thermal Resistance
circuit board (PCB) thermal resistance, the maximum ambient
Package Type θ
temperature can exceed the maximum limit as long as the junction
JA θJC ΨJB Unit
8-Lead LFCSP 50.2 31.7 18.2 °C/W temperature is within specification limits. The TJ of the device is 6-Lead LFCSP 68.9 42.29 44.1 °C/W dependent on the ambient temperature (TA), the power dissipation 5-Lead TSOT 170 Not applicable 43 °C/W of the device (PD), and the junction-to-ambient thermal resistance of the package (θJA).
ESD CAUTION
Maximum TJ is calculated from the TA and PD using the formula TJ = TA + (PD × θJA) Junction-to-ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on the application and board layout. Rev. M | Page 6 of 32 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE MODE OPERATION APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties ENABLE PIN OPERATION SOFT START NOISE REDUCTION OF THE ADJUSTABLE ADP7182 CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS Thermal Characterization Parameter, ΨJB PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
In applications where high maximum power dissipation exists,
Table 3.
close attention to thermal board design is required. The value of
Parameter Rating
θJA can vary, depending on PCB material, layout, and environ- VIN to GND +0.3 V to −30 V mental conditions. The specified values of θJA are based on a VOUT to GND 0.3 V to VIN 4-layer, 4 in. × 3 in. circuit board. See JESD51-7 and JESD51-9 for EN to GND 5 V to VIN detailed information on the board construction. For additional EN to VIN +30 V to −0.3 V information, see the AN-617 Application Note, MicroCSP™ ADJ to GND +0.3 V to VOUT Wafer Level Chip Scale Package. Storage Temperature Range −65°C to +150°C Ψ Operating Junction Temperature Range −40°C to +125°C JB is the junction-to-board thermal characterization parameter with units of °C/W. Ψ Operating Ambient Temperature Range −40°C to +85°C JB of the package is based on modeling and calculation using a 4-layer board. The JESD51-12, Guidelines for Soldering Conditions JEDEC J-STD-020 Reporting and Using Electronic Package Thermal Information, states that thermal characterization parameters are not the same as Stresses at or above those listed under Absolute Maximum thermal resistances. ΨJB measures the component power flowing Ratings may cause permanent damage to the product. This is a through multiple thermal paths rather than a single path as in stress rating only; functional operation of the product at these thermal resistance, θJB. Therefore, ΨJB thermal paths include or any other conditions above those indicated in the operational convection from the top of the package as well as radiation from section of this specification is not implied. Operation beyond the package, factors that make ΨJB more useful in real-world the maximum operating conditions for extended periods may applications. Maximum junction temperature is calculated from affect product reliability. the board temperature (TB) and power dissipation using the
THERMAL DATA
formula Absolute maximum ratings apply individually only, not in TJ = TB + (PD × ΨJB) combination. The ADP7182 can be damaged when the junction See JESD51-8 and JESD51-12 for more detailed information temperature limits are exceeded. Monitoring ambient temperature about ΨJB. does not guarantee that junction temperature (TJ) is within the specified temperature limits. In applications with high power
THERMAL RESISTANCE
dissipation and poor thermal resistance, the maximum ambient θJA, θJC, and ΨJB are specified for the worst-case conditions, that is, a temperature may have to be derated. device soldered in a circuit board for surface-mount packages. In applications with moderate power dissipation and low printed
Table 4. Thermal Resistance
circuit board (PCB) thermal resistance, the maximum ambient
Package Type θ
temperature can exceed the maximum limit as long as the junction
JA θJC ΨJB Unit
8-Lead LFCSP 50.2 31.7 18.2 °C/W temperature is within specification limits. The TJ of the device is 6-Lead LFCSP 68.9 42.29 44.1 °C/W dependent on the ambient temperature (TA), the power dissipation 5-Lead TSOT 170 Not applicable 43 °C/W of the device (PD), and the junction-to-ambient thermal resistance of the package (θJA).
ESD CAUTION
Maximum TJ is calculated from the TA and PD using the formula TJ = TA + (PD × θJA) Junction-to-ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on the application and board layout. Rev. M | Page 6 of 32 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE MODE OPERATION APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties ENABLE PIN OPERATION SOFT START NOISE REDUCTION OF THE ADJUSTABLE ADP7182 CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS Thermal Characterization Parameter, ΨJB PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
