Datasheet ADM7150 (Analog Devices) - 5

Data Sheet ADM7150 ABSOLUTE MAXIMUM RATINGS
Junction to ambient thermal resistance (θJA) of the package is
Table 3.
based on modeling and calculation using a 4-layer board. The
Parameter Rating
junction to ambient thermal resistance is highly dependent on VIN to GND −0.3 V to +18 V the application and board layout. In applications where high VREG to GND −0.3 V to VIN, or +6 V maximum power dissipation exists, close attention to thermal (whichever is less) board design is required. The value of θJA may vary, depending VOUT to GND −0.3 V to VREG, or +6 V on PCB material, layout, and environmental conditions. The (whichever is less) specified values of θ VOUT to BYP ±0.3 V JA are based on a 4-layer, 4 in. × 3 in. circuit board. See JESD51-7 and JESD51-9 for detailed information EN to GND −0.3 V to +18 V on the board construction. BYP to GND −0.3 V to VREG, or +6 V (whichever is less) ΨJB is the junction to board thermal characterization parameter REF to GND −0.3 V to VREG, or +6 V with units of °C/W. ΨJB of the package is based on modeling and the (whichever is less) calculation using a 4-layer board. The JESD51-12, Guidelines for REF_SENSE to GND −0.3 V to +6 V Reporting and Using Electronic Package Thermal Information, Storage Temperature Range −65°C to +150°C states that thermal characterization parameters are not the same Junction Temperature 150°C as thermal resistances. ΨJB measures the component power Operating Ambient Temperature Range −40°C to +125°C flowing through multiple thermal paths rather than a single Soldering Conditions JEDEC J-STD-020 path as in thermal resistance (θJB). Therefore, ΨJB thermal paths Stresses above those listed under Absolute Maximum Ratings include convection from the top of the package as wel as may cause permanent damage to the device. This is a stress radiation from the package, factors that make ΨJB more useful rating only; functional operation of the device at these or any in real-world applications. Maximum junction temperature (TJ) other conditions above those indicated in the operational is calculated from the board temperature (TB) and power section of this specification is not implied. Exposure to absolute dissipation (PD) using the formula maximum rating conditions for extended periods may affect TJ = TB + (PD × ΨJB) device reliability. See JESD51-8 and JESD51-12 for more detailed information
THERMAL DATA
about ΨJB. Absolute maximum ratings apply individual y only, not in
THERMAL RESISTANCE
combination. The ADM7150 can be damaged when the θ junction temperature limits are exceeded. Monitoring ambient JA, θJC, and ΨJB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. temperature does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation
Table 4. Thermal Resistance
and poor thermal resistance, the maximum ambient temperature
Package Type θJA θJC ΨJB Unit
may have to be derated. 8-Lead LFCSP 36.7 23.5 13.3 °C/W In applications with moderate power dissipation and low 8-Lead SOIC 36.9 27.1 18.6 °C/W printed circuit board (PCB) thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. The
ESD CAUTION
junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation of the device (PD), and the junction to ambient thermal resistance of the package (θJA). Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the formula TJ = TA + (PD × θJA) Rev. 0 | Page 5 of 24 Document Outline Features Applications General Description Typical Application Circuit Table of Contents Revision History Specifications Input and Output Capacitor Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties Enable (EN) and Undervoltage Lockout (UVLO) Start-Up Time REF, BYP, and, VREG pins Current-Limit and Thermal Overload Protection Thermal Considerations Thermal Characterization Parameter (ΨJB) Printed Circuit Board Layout Considerations Outline Dimensions Ordering Guide