Datasheet ADP7102 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 20 V, 300 mA, Low Noise, CMOS LDO |
| Pages / Page | 28 / 6 — ADP7102. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. VOUT … |
| Revision | E |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
ADP7102. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. VOUT 1. 8 VIN. SENSE/ADJ 2. 7 PG. ADP7102 7 PG. TOP VIEW. GND 3
Model Line for this Datasheet
Text Version of Document
ADP7102 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VOUT 1 8 VIN VOUT 1 8 VIN SENSE/ADJ 2 ADP7102 7 PG SENSE/ADJ 2 ADP7102 7 PG TOP VIEW GND 3 TOP VIEW (Not to Scale) 6 GND GND 3 6 GND (Not to Scale) NC 4 5 EN/UVLO NC 4 5 EN/UVLO NOTES NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. THIS PIN. 2. IT IS HIGHLY RECOMMENDED THAT THE 2. IT IS HIGHLY RECOMMENDED THAT THE EXPOSED PAD ON THE BOTTOM OF THE
4 03 0
EXPOSED PAD ON THE BOTTOM OF THE PACKAGE BE CONNECTED TO THE GROUND
-10 6-
PACKAGE BE CONNECTED TO THE GROUND
06
PLANE ON THE BOARD.
50
PLANE ON THE BOARD.
09 095 Figure 3. LFCSP Package Figure 4. Narrow Body SOIC Package
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor. 2 SENSE/ADJ Sense (SENSE). Measures the actual output voltage at the load and feeds it to the error amplifier. Connect SENSE as close as possible to the load to minimize the effect of IR drop between the regulator output and the load. This function applies to fixed voltages only. Adjust Input (ADJ). An external resistor divider sets the output voltage. This function applies to adjustable voltages only. 3 GND Ground. 4 NC Do Not Connect to this Pin. 5 EN/UVLO Enable Input (EN). Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. Programmable Undervoltage Lockout (UVLO). When the programmable UVLO function is used, the upper and lower thresholds are determined by the programming resistors. 6 GND Ground. 7 PG Power Good. This open-drain output requires an external pull-up resistor to VIN or VOUT. If the device is in shutdown, current limit, thermal shutdown, or falls below 90% of the nominal output voltage, PG immediately transitions low. If the power-good function is not used, the pin may be left open or connected to ground. 8 VIN Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor. EPAD Exposed Pad. Exposed paddle on the bottom of the package. The EPAD enhances thermal performance and is electrically connected to GND inside the package. It is highly recommended that the EPAD be connected to the ground plane on the board. Rev. E | Page 6 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA Thermal Resistance ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PROGRAMABLE UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FEATURE NOISE REDUCTION OF THE ADJUSTABLE ADP7102 CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
4 03 0
EXPOSED PAD ON THE BOTTOM OF THE PACKAGE BE CONNECTED TO THE GROUND
-10 6-
PACKAGE BE CONNECTED TO THE GROUND
06
PLANE ON THE BOARD.
50
PLANE ON THE BOARD.
09 095 Figure 3. LFCSP Package Figure 4. Narrow Body SOIC Package
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor. 2 SENSE/ADJ Sense (SENSE). Measures the actual output voltage at the load and feeds it to the error amplifier. Connect SENSE as close as possible to the load to minimize the effect of IR drop between the regulator output and the load. This function applies to fixed voltages only. Adjust Input (ADJ). An external resistor divider sets the output voltage. This function applies to adjustable voltages only. 3 GND Ground. 4 NC Do Not Connect to this Pin. 5 EN/UVLO Enable Input (EN). Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. Programmable Undervoltage Lockout (UVLO). When the programmable UVLO function is used, the upper and lower thresholds are determined by the programming resistors. 6 GND Ground. 7 PG Power Good. This open-drain output requires an external pull-up resistor to VIN or VOUT. If the device is in shutdown, current limit, thermal shutdown, or falls below 90% of the nominal output voltage, PG immediately transitions low. If the power-good function is not used, the pin may be left open or connected to ground. 8 VIN Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor. EPAD Exposed Pad. Exposed paddle on the bottom of the package. The EPAD enhances thermal performance and is electrically connected to GND inside the package. It is highly recommended that the EPAD be connected to the ground plane on the board. Rev. E | Page 6 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA Thermal Resistance ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PROGRAMABLE UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FEATURE NOISE REDUCTION OF THE ADJUSTABLE ADP7102 CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
