Datasheet AD633 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Low Cost Analog Multiplier |
| Pages / Page | 20 / 9 — Data Sheet. AD633. APPLICATIONS INFORMATION. +15V. 0.1µF. +VS 8. W =. … |
| Revision | K |
| File Format / Size | PDF / 1.8 Mb |
| Document Language | English |
Data Sheet. AD633. APPLICATIONS INFORMATION. +15V. 0.1µF. +VS 8. W =. 10V. AD633JN. 1kΩ. MULTIPLIER CONNECTIONS. 3kΩ. –VS 5. –15V. INPUT
Model Line for this Datasheet
Text Version of Document
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Data Sheet AD633 APPLICATIONS INFORMATION
The AD633 is well suited for such applications as modulation
+15V
and demodulation, automatic gain control, power measurement,
0.1µF
voltage-controlled amplifiers, and frequency doublers. These
E 1 X1 +VS 8
applications show the pin connections for the AD633JN (8-lead
R E2 2 X2 W 7 W = R1 10V
PDIP), which differs from the AD633JR (8-lead SOIC).
AD633JN 1kΩ 3 Y1 Z 6 C R2 MULTIPLIER CONNECTIONS 3kΩ 4 Y2 –VS 5
Figure 12 shows the basic connections for multiplication. The X
0.1µF
013 and Y inputs normally have their negative nodes grounded, but
–15V
00786- they are ful y differential, and in many applications, the grounded Figure 14. Bounceless Frequency Doubler (See the Model Results Section) inputs may be reversed (to facilitate interfacing with signals of a particular polarity while achieving some desired output polarity), At ωo = 1/CR, the X input leads the input signal by 45° (and is or both may be driven. attenuated by √2), and the Y input lags the X input by 45° (and is also attenuated by √2). Because the X and Y inputs are 90° out of
+15V
phase, the response of the circuit is (satisfying Equation 3)
0.1µF + 1 X1 +VS 8
1 E E
X
W = sin ω t + 0 45° sin ω t + 0 45°
INPUT (X1 – X2)(Y1 – Y2)
(10 V) ( ) ( )
– 2 X2 W 7 W = + Z
2 2
AD633JN 10V
2
+ 3 Y1 Z 6 OPTIONAL SUMMING
E
Y INPUT, Z
= sin 2 ω t (4)
INPUT
(40 V) ( 0 )
– 4 Y2 –VS 5 0.1µF
1 1 0 which has no dc component. Resistor R1 and Resistor R2 are
–15V
00786- included to restore the output amplitude to 10 V for an input Figure 12. Basic Multiplier Connections (See the Model Results Section) amplitude of 10 V.
SQUARING AND FREQUENCY DOUBLING
The amplitude of the output is only a weak function of frequency; As is shown in Figure 13, squaring of an input signal, E, is the output amplitude is 0.5% too low at ω = 0.9 ω0 and ω0 = 1.1 ω0. achieved simply by connecting the X and Y inputs in paral el to
GENERATING INVERSE FUNCTIONS
produce an output of E2/10 V. The input can have either polarity, but the output is positive. However, the output polarity can be Inverse functions of multiplication, such as division and square reversed by interchanging the X or Y inputs. The Z input can be rooting, can be implemented by placing a multiplier in the feedback used to add a further signal to the output. loop of an op amp. Figure 15 shows how to implement square rooting with the transfer function for the condition E < 0.
+15V
The 1N4148 diode is required to prevent latchup, which can
0.1µF E 1 X1 +VS 8
occur in such applications if the input were to change polarity,
E2
even momentarily.
2 X2 W 7 W = AD633JN 10V 3 Y1 Z 6
W = − (10E)V (5)
4 Y2 –VS 5 10kΩ 0.1µF
012
+15V +15V –15V 0.01µF 0.1µF
00786-
1 X1 +V
Figure 13. Connections for Squaring
S 8 0.1µF 10kΩ 2 7 X2 W 7
When the input is a sine wave E sin ωt, this squarer behaves as a
E < 0V 2 AD633JN
frequency doubler, because
AD711 6 3 Y1 Z 6 –15V
(
3 1N4148 4 –V
E sin ωt)2
4 Y2
E2
S 5
= (1− cos 2 ωt) (2)
0.1µF 0.1µF
10 V 20 V 014
–15V
Equation 2 shows a dc term at the output that varies strongly
W = √ –(10V)E
000786- with the amplitude of the input, E. This can be avoided using Figure 15. Connections for Square Rooting the connections shown in Figure 14, where an RC network is used to generate two signals whose product has no dc term. It uses the identity cos θ θ 1 sin = (sin 2 θ) (3) 2 Rev. K | Page 9 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION ERROR SOURCES APPLICATIONS INFORMATION MULTIPLIER CONNECTIONS SQUARING AND FREQUENCY DOUBLING GENERATING INVERSE FUNCTIONS VARIABLE SCALE FACTOR CURRENT OUTPUT LINEAR AMPLITUDE MODULATOR VOLTAGE-CONTROLLED, LOW-PASS AND HIGH-PASS FILTERS VOLTAGE-CONTROLLED QUADRATURE OSCILLATOR AUTOMATIC GAIN CONTROL (AGC) AMPLIFIERS MODEL RESULTS EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING MULTISIM EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING PSPICE EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING SIMETRIX EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD633 APPLICATIONS INFORMATION
The AD633 is well suited for such applications as modulation
+15V
and demodulation, automatic gain control, power measurement,
0.1µF
voltage-controlled amplifiers, and frequency doublers. These
E 1 X1 +VS 8
applications show the pin connections for the AD633JN (8-lead
R E2 2 X2 W 7 W = R1 10V
PDIP), which differs from the AD633JR (8-lead SOIC).
AD633JN 1kΩ 3 Y1 Z 6 C R2 MULTIPLIER CONNECTIONS 3kΩ 4 Y2 –VS 5
Figure 12 shows the basic connections for multiplication. The X
0.1µF
013 and Y inputs normally have their negative nodes grounded, but
–15V
00786- they are ful y differential, and in many applications, the grounded Figure 14. Bounceless Frequency Doubler (See the Model Results Section) inputs may be reversed (to facilitate interfacing with signals of a particular polarity while achieving some desired output polarity), At ωo = 1/CR, the X input leads the input signal by 45° (and is or both may be driven. attenuated by √2), and the Y input lags the X input by 45° (and is also attenuated by √2). Because the X and Y inputs are 90° out of
+15V
phase, the response of the circuit is (satisfying Equation 3)
0.1µF + 1 X1 +VS 8
1 E E
X
W = sin ω t + 0 45° sin ω t + 0 45°
INPUT (X1 – X2)(Y1 – Y2)
(10 V) ( ) ( )
– 2 X2 W 7 W = + Z
2 2
AD633JN 10V
2
+ 3 Y1 Z 6 OPTIONAL SUMMING
E
Y INPUT, Z
= sin 2 ω t (4)
INPUT
(40 V) ( 0 )
– 4 Y2 –VS 5 0.1µF
1 1 0 which has no dc component. Resistor R1 and Resistor R2 are
–15V
00786- included to restore the output amplitude to 10 V for an input Figure 12. Basic Multiplier Connections (See the Model Results Section) amplitude of 10 V.
SQUARING AND FREQUENCY DOUBLING
The amplitude of the output is only a weak function of frequency; As is shown in Figure 13, squaring of an input signal, E, is the output amplitude is 0.5% too low at ω = 0.9 ω0 and ω0 = 1.1 ω0. achieved simply by connecting the X and Y inputs in paral el to
GENERATING INVERSE FUNCTIONS
produce an output of E2/10 V. The input can have either polarity, but the output is positive. However, the output polarity can be Inverse functions of multiplication, such as division and square reversed by interchanging the X or Y inputs. The Z input can be rooting, can be implemented by placing a multiplier in the feedback used to add a further signal to the output. loop of an op amp. Figure 15 shows how to implement square rooting with the transfer function for the condition E < 0.
+15V
The 1N4148 diode is required to prevent latchup, which can
0.1µF E 1 X1 +VS 8
occur in such applications if the input were to change polarity,
E2
even momentarily.
2 X2 W 7 W = AD633JN 10V 3 Y1 Z 6
W = − (10E)V (5)
4 Y2 –VS 5 10kΩ 0.1µF
012
+15V +15V –15V 0.01µF 0.1µF
00786-
1 X1 +V
Figure 13. Connections for Squaring
S 8 0.1µF 10kΩ 2 7 X2 W 7
When the input is a sine wave E sin ωt, this squarer behaves as a
E < 0V 2 AD633JN
frequency doubler, because
AD711 6 3 Y1 Z 6 –15V
(
3 1N4148 4 –V
E sin ωt)2
4 Y2
E2
S 5
= (1− cos 2 ωt) (2)
0.1µF 0.1µF
10 V 20 V 014
–15V
Equation 2 shows a dc term at the output that varies strongly
W = √ –(10V)E
000786- with the amplitude of the input, E. This can be avoided using Figure 15. Connections for Square Rooting the connections shown in Figure 14, where an RC network is used to generate two signals whose product has no dc term. It uses the identity cos θ θ 1 sin = (sin 2 θ) (3) 2 Rev. K | Page 9 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION ERROR SOURCES APPLICATIONS INFORMATION MULTIPLIER CONNECTIONS SQUARING AND FREQUENCY DOUBLING GENERATING INVERSE FUNCTIONS VARIABLE SCALE FACTOR CURRENT OUTPUT LINEAR AMPLITUDE MODULATOR VOLTAGE-CONTROLLED, LOW-PASS AND HIGH-PASS FILTERS VOLTAGE-CONTROLLED QUADRATURE OSCILLATOR AUTOMATIC GAIN CONTROL (AGC) AMPLIFIERS MODEL RESULTS EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING MULTISIM EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING PSPICE EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING SIMETRIX EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
