Datasheet AD734 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 10 MHz, 4-Quadrant Multiplier/Divider |
| Pages / Page | 20 / 10 — AD734. FUNCTIONAL DESCRIPTION. AVAILABLE TRANSFER FUNCTIONS |
| Revision | E |
| File Format / Size | PDF / 456 Kb |
| Document Language | English |
AD734. FUNCTIONAL DESCRIPTION. AVAILABLE TRANSFER FUNCTIONS
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AD734 FUNCTIONAL DESCRIPTION
The AD734 embodies more than two decades of experience in be replaced by a fixed or variable external voltage ranging from the design and manufacture of analog multipliers to provide: 10 mV to more than 10 V. • The high gain output op amp nulls the difference between XY/ A new output amplifier design with more than 20 times the U and an additional signal, Z, to generate the final output, W. slew rate of the AD534 (450 V/μs vs. 20 V/μs) for a full The actual transfer function can take on several forms, depending power (20 V p-p) bandwidth of 10 MHz. • on the connections used. The AD734 can perform all of the Very low distortion, even at full power, through the use of functions supported by the AD534, and new functions using circuit and trimming techniques that virtually eliminate all the direct-division mode provided by the U interface. of the spurious nonlinearities found in earlier designs. • Direct control of the denominator, resulting in higher Each input pair (X1 and X2, Y1 and Y2, Z1 and Z2) has a multiplier accuracy and a gain-bandwidth product at small differential input resistance of 50 kΩ; this is formed by actual denominator values that is typically 200 times greater than resistors (not a small-signal approximation) and is subject to a that of the AD534 in divider modes. tolerance of ±20%. The common-mode input resistance is • Very clean transient response, achieved through the use of several megohms and the parasitic capacitance is about 2 pF. a novel input stage design and wideband output amplifier, The bias currents associated with these inputs are nulled by which also ensure that distortion remains low even at high laser-trimming, such that when one input of a pair is optionally frequencies. ac-coupled and the other is grounded, the residual offset voltage • Superior noise performance by careful choice of device is typically less than 5 mV, which corresponds to a bias current geometries and operating conditions, which provide a of only 100 nA. This low bias current ensures that mismatches guaranteed 88 dB of dynamic range in a 20 kHz bandwidth. in the sources’ resistances at a pair of inputs does not cause an offset error. These currents remain low over the full temperature Figure 3 shows the lead configuration of the 14-lead PDIP and range and supply voltages. CERDIP packages. The common-mode range of the X, Y, and Z inputs does not Figure 1 is a simplified block diagram of the AD734. Operation fully extend to the supply rails. Nevertheless, it is often possible is similar to that of the industry-standard AD534, and in many to operate the AD734 with one terminal of an input pair con- applications, these parts are pin compatible. The main functional nected to either the positive or negative supply, unlike previous difference is the provision for direct control of the denominator multipliers. The common-mode resistance is several megohms. voltage, U, explained fully in the Direct Denominator Control section. Internal signals are in the form of currents, but the The full-scale output of ±10 V can be delivered to a load resistance function of the AD734 can be understood using voltages of 1 kΩ (although the specifications apply to the standard multi- throughout, as shown in Figure 1. plier load condition of 2 kΩ). The output amplifier is stable, driving capacitive loads of at least 100 pF, when a slight increase The AD734 differential X, Y, and Z inputs are handled by in bandwidth results from the peaking caused by this capacitance. wideband interfaces that have low offset, low bias current, and The 450 V/μs slew rate of the AD734 output amplifier ensures low distortion. The AD734 responds to the difference signals that the bandwidth of 10 MHz can be maintained up to the full X = X1 − X2, Y = Y1 − Y2, and Z = Z1 − Z2, and rejects common- output of 20 V p-p. Operation at reduced supply voltages is mode voltages on these inputs. The X, Y, and Z interfaces provide a possible, down to ±8 V, with reduced signal levels. nominal full-scale (FS) voltage of ±10 V, but, due to the special design of the input stages, the linear range of the differential
AVAILABLE TRANSFER FUNCTIONS
input can be as large as ±17 V. Also, unlike previous designs, the The uncommitted (open-loop) transfer function of the AD734 is response on these inputs is not clipped abruptly above ±15 V, ⎧(X − X Y Y 1 2 )( − 1 2 ) but drops to a slope of one half. W = A Z Z ) (1) O ⎨ − ( ⎫ − 1 2 ⎬ U The bipolar input signals X and Y are multiplied in a translinear ⎩ ⎭ core of novel design to generate the product XY/U. The denomina- where AO is the open-loop gain of the output op amp, typically tor voltage, U, is internally set to an accurate, temperature-stable 72 dB. When a negative feedback path is provided, the circuit value of 10 V, derived from a buried-Zener reference. An uncali- forces the quantity inside the brackets essentially to zero, brated fraction of the denominator voltage U appears between resulting in the equation the voltage reference pin (ER) and the negative supply pin (VN), (X1 − X2)(Y1 − Y2) = U (Z1 − Z2) (2) for use in certain applications where a temperature-compensated voltage reference is desirable. The internal denominator, U, can This is the most useful generalized transfer function for the be disabled, by connecting the denominator disable Pin 13 AD734; it expresses a balance between the product XY and the (DD) to the positive supply pin (VP); the denominator can then product UZ. The absence of the output, W, in this equation only reflects the fact that the input to be connected to the op amp output is not specified. Rev. E | Page 10 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION AVAILABLE TRANSFER FUNCTIONS DIRECT DENOMINATOR CONTROL OPERATION AS A MULTIPLIER Standard Multiplier Connections Current Output Squaring and Frequency-Doubling OPERATION AS A DIVIDER Feedback Divider Connections Connections for Square-Rooting DIVISION BY DIRECT DENOMINATOR CONTROL A PRECISION AGC LOOP WIDEBAND RMS-TO-DC CONVERTER USING U INTERFACE LOW DISTORTION MIXER OUTLINE DIMENSIONS ORDERING GUIDE
AD734 FUNCTIONAL DESCRIPTION
The AD734 embodies more than two decades of experience in be replaced by a fixed or variable external voltage ranging from the design and manufacture of analog multipliers to provide: 10 mV to more than 10 V. • The high gain output op amp nulls the difference between XY/ A new output amplifier design with more than 20 times the U and an additional signal, Z, to generate the final output, W. slew rate of the AD534 (450 V/μs vs. 20 V/μs) for a full The actual transfer function can take on several forms, depending power (20 V p-p) bandwidth of 10 MHz. • on the connections used. The AD734 can perform all of the Very low distortion, even at full power, through the use of functions supported by the AD534, and new functions using circuit and trimming techniques that virtually eliminate all the direct-division mode provided by the U interface. of the spurious nonlinearities found in earlier designs. • Direct control of the denominator, resulting in higher Each input pair (X1 and X2, Y1 and Y2, Z1 and Z2) has a multiplier accuracy and a gain-bandwidth product at small differential input resistance of 50 kΩ; this is formed by actual denominator values that is typically 200 times greater than resistors (not a small-signal approximation) and is subject to a that of the AD534 in divider modes. tolerance of ±20%. The common-mode input resistance is • Very clean transient response, achieved through the use of several megohms and the parasitic capacitance is about 2 pF. a novel input stage design and wideband output amplifier, The bias currents associated with these inputs are nulled by which also ensure that distortion remains low even at high laser-trimming, such that when one input of a pair is optionally frequencies. ac-coupled and the other is grounded, the residual offset voltage • Superior noise performance by careful choice of device is typically less than 5 mV, which corresponds to a bias current geometries and operating conditions, which provide a of only 100 nA. This low bias current ensures that mismatches guaranteed 88 dB of dynamic range in a 20 kHz bandwidth. in the sources’ resistances at a pair of inputs does not cause an offset error. These currents remain low over the full temperature Figure 3 shows the lead configuration of the 14-lead PDIP and range and supply voltages. CERDIP packages. The common-mode range of the X, Y, and Z inputs does not Figure 1 is a simplified block diagram of the AD734. Operation fully extend to the supply rails. Nevertheless, it is often possible is similar to that of the industry-standard AD534, and in many to operate the AD734 with one terminal of an input pair con- applications, these parts are pin compatible. The main functional nected to either the positive or negative supply, unlike previous difference is the provision for direct control of the denominator multipliers. The common-mode resistance is several megohms. voltage, U, explained fully in the Direct Denominator Control section. Internal signals are in the form of currents, but the The full-scale output of ±10 V can be delivered to a load resistance function of the AD734 can be understood using voltages of 1 kΩ (although the specifications apply to the standard multi- throughout, as shown in Figure 1. plier load condition of 2 kΩ). The output amplifier is stable, driving capacitive loads of at least 100 pF, when a slight increase The AD734 differential X, Y, and Z inputs are handled by in bandwidth results from the peaking caused by this capacitance. wideband interfaces that have low offset, low bias current, and The 450 V/μs slew rate of the AD734 output amplifier ensures low distortion. The AD734 responds to the difference signals that the bandwidth of 10 MHz can be maintained up to the full X = X1 − X2, Y = Y1 − Y2, and Z = Z1 − Z2, and rejects common- output of 20 V p-p. Operation at reduced supply voltages is mode voltages on these inputs. The X, Y, and Z interfaces provide a possible, down to ±8 V, with reduced signal levels. nominal full-scale (FS) voltage of ±10 V, but, due to the special design of the input stages, the linear range of the differential
AVAILABLE TRANSFER FUNCTIONS
input can be as large as ±17 V. Also, unlike previous designs, the The uncommitted (open-loop) transfer function of the AD734 is response on these inputs is not clipped abruptly above ±15 V, ⎧(X − X Y Y 1 2 )( − 1 2 ) but drops to a slope of one half. W = A Z Z ) (1) O ⎨ − ( ⎫ − 1 2 ⎬ U The bipolar input signals X and Y are multiplied in a translinear ⎩ ⎭ core of novel design to generate the product XY/U. The denomina- where AO is the open-loop gain of the output op amp, typically tor voltage, U, is internally set to an accurate, temperature-stable 72 dB. When a negative feedback path is provided, the circuit value of 10 V, derived from a buried-Zener reference. An uncali- forces the quantity inside the brackets essentially to zero, brated fraction of the denominator voltage U appears between resulting in the equation the voltage reference pin (ER) and the negative supply pin (VN), (X1 − X2)(Y1 − Y2) = U (Z1 − Z2) (2) for use in certain applications where a temperature-compensated voltage reference is desirable. The internal denominator, U, can This is the most useful generalized transfer function for the be disabled, by connecting the denominator disable Pin 13 AD734; it expresses a balance between the product XY and the (DD) to the positive supply pin (VP); the denominator can then product UZ. The absence of the output, W, in this equation only reflects the fact that the input to be connected to the op amp output is not specified. Rev. E | Page 10 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION AVAILABLE TRANSFER FUNCTIONS DIRECT DENOMINATOR CONTROL OPERATION AS A MULTIPLIER Standard Multiplier Connections Current Output Squaring and Frequency-Doubling OPERATION AS A DIVIDER Feedback Divider Connections Connections for Square-Rooting DIVISION BY DIRECT DENOMINATOR CONTROL A PRECISION AGC LOOP WIDEBAND RMS-TO-DC CONVERTER USING U INTERFACE LOW DISTORTION MIXER OUTLINE DIMENSIONS ORDERING GUIDE
