Datasheet AD8226 (Analog Devices) - 16
| Manufacturer | Analog Devices |
| Description | Wide Supply Range, Rail-to-Rail Output Instrumentation Amplifier |
| Pages / Page | 28 / 16 — AD8226. Data Sheet. 5V/DIV. 15.46μs TO 0.01%. 17.68µs TO 0.001%. … |
| Revision | D |
| File Format / Size | PDF / 1.6 Mb |
| Document Language | English |
AD8226. Data Sheet. 5V/DIV. 15.46μs TO 0.01%. 17.68µs TO 0.001%. 0.002%/DIV. 1.5pA/DIV. 1s/DIV. 40µs/DIV. VS = ±15V. ) p p- 21. V (. GE A
Model Line for this Datasheet
Text Version of Document
AD8226 Data Sheet 5V/DIV 15.46μs TO 0.01% 17.68µs TO 0.001% 0.002%/DIV
25 0 1 6-
1.5pA/DIV 1s/DIV
06
40µs/DIV
6- 703 0 03 07 Figure 45. 0.1 Hz to 10 Hz Current Noise Figure 48. Large-Signal Pulse Response and Settling Time, G = 10, 10 V Step, VS = ±15 V
30 27 VS = ±15V 24 ) p p- 21 V ( 5V/DIV 18 GE A 15 39.64μs TO 0.01% OLT 58.04µs TO 0.001% V T 12 U TP 9 OU 0.002%/DIV 6 VS = +5V 3
9 05 6- -062 03
100µs/DIV 0
07 036 07
100 1k 10k 100k 1M FREQUENCY (Hz)
Figure 46. Large-Signal Frequency Response Figure 49. Large-Signal Pulse Response and Settling Time, G = 100, 10 V Step, VS = ±15 V
5V/DIV 5V/DIV 25.38μs TO 0.01% 26.02µs TO 0.001% 349.6μs TO 0.01% 529.6µs TO 0.001% 0.002%/DIV 0.002%/DIV
0 06
40µs/DIV
6- 03 -063
400µs/DIV
07 036 07 Figure 47. Large-Signal Pulse Response and Settling Time, Figure 50. Large-Signal Pulse Response and Settling Time, G = 1, 10 V Step, VS = ±15 V G = 1000, 10 V Step, VS = ±15 V Rev. D | Page 16 of 28 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE Performance Across Temperature Recommendation for Best Performance LAYOUT Common-Mode Rejection Ratio Over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION DIFFERENTIAL DRIVE Tips for Best Differential Output Performance PRECISION STRAIN GAGE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE
25 0 1 6-
1.5pA/DIV 1s/DIV
06
40µs/DIV
6- 703 0 03 07 Figure 45. 0.1 Hz to 10 Hz Current Noise Figure 48. Large-Signal Pulse Response and Settling Time, G = 10, 10 V Step, VS = ±15 V
30 27 VS = ±15V 24 ) p p- 21 V ( 5V/DIV 18 GE A 15 39.64μs TO 0.01% OLT 58.04µs TO 0.001% V T 12 U TP 9 OU 0.002%/DIV 6 VS = +5V 3
9 05 6- -062 03
100µs/DIV 0
07 036 07
100 1k 10k 100k 1M FREQUENCY (Hz)
Figure 46. Large-Signal Frequency Response Figure 49. Large-Signal Pulse Response and Settling Time, G = 100, 10 V Step, VS = ±15 V
5V/DIV 5V/DIV 25.38μs TO 0.01% 26.02µs TO 0.001% 349.6μs TO 0.01% 529.6µs TO 0.001% 0.002%/DIV 0.002%/DIV
0 06
40µs/DIV
6- 03 -063
400µs/DIV
07 036 07 Figure 47. Large-Signal Pulse Response and Settling Time, Figure 50. Large-Signal Pulse Response and Settling Time, G = 1, 10 V Step, VS = ±15 V G = 1000, 10 V Step, VS = ±15 V Rev. D | Page 16 of 28 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE Performance Across Temperature Recommendation for Best Performance LAYOUT Common-Mode Rejection Ratio Over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION DIFFERENTIAL DRIVE Tips for Best Differential Output Performance PRECISION STRAIN GAGE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE
