link to page 13 link to page 14 link to page 11 link to page 13 AD8230INPUT VOLTAGE RANGEPOWER SUPPLY BYPASSING The input common-mode range of the AD8230 is rail to rail. A regulated dc voltage should be used to power the However, the differential input voltage range is limited to instrumentation amplifier. Noise on the supply pins can approximately 750 mV. The AD8230 does not phase invert adversely affect performance. Bypass capacitors should be when its inputs are overdriven. used to decouple the amplifier. INPUT PROTECTION The AD8230 has internal clocked circuitry that requires The input voltage is limited to within 0.6 V beyond the supply adequate supply bypassing. A 0.1 μF capacitor should be placed rails by the internal ESD protection diodes. Resistors and low as close to each supply pin as possible. As shown in Figure 32, a leakage diodes can be used to limit excessive, external voltage 10 μF tantalum capacitor can be used further away from the part. and current from damaging the inputs, as shown in Figure 37. POWER SUPPLY BYPASSING FOR MULTIPLE Figure 39 shows an overvoltage protection circuit between the CHANNEL SYSTEMS thermocouple and the AD8230. The best way to prevent clock interference in multichannel +VS systems is to lay out the PCB with a star node for the positive –VSBAV199 0.1µF supply and a star node for the negative supply. Using such a +V –VSS technique, crosstalk between clocks is minimized. If laying out 0.1µF star nodes is not feasible, use wide traces to minimize parasitic 24 inductance and decouple frequently along the power supply 12.49kΩAD82308VOUT traces. Examples are shown in Figure 38. Care and forethought 2.49kΩ57 go a long way in maximizing performance. 6319.1kΩ+V –V200ΩSSBAV199 37 0 3- 506 0 Figure 37. Overvoltage Input Protection –VS+VS10µF1µF1µF1µF1µF10µF0.1µF0.1µF0.1µF0.1µF0.1µF–VS–VS–VS–VS–VS1818181818+VS+V+VS+VS+VS2S72727272736363636360.1µF0.1µF0.1µF0.1µF0.1µF4545454545AD8230AD8230AD8230AD8230AD8230STAR –VS10µFSTAR +VS10µF0.1µF0.1µF0.1µF0.1µF–VS–VS–VS–VS18181818+VS+VS+VS+VS27272727363636360.1µF0.1µF0.1µF0.1µF45454545 38 0 AD8230AD8230AD8230AD8230 3- 06 05 Figure 38. Use Star Nodes for +VS and −VS or Use Thick Traces and Decouple Frequently Along the Supply Lines Rev. B | Page 13 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SETTING THE GAIN LEVEL-SHIFTING THE OUTPUT SOURCE IMPEDANCE AND INPUT SETTLING TIME INPUT VOLTAGE RANGE INPUT PROTECTION POWER SUPPLY BYPASSING POWER SUPPLY BYPASSING FOR MULTIPLE CHANNEL SYSTEMS LAYOUT APPLICATIONS OUTLINE DIMENSIONS ORDERING GUIDE