Datasheet K6R1016V1D (Samsung) - 8
| Manufacturer | Samsung |
| Description | CMOS SRAM |
| Pages / Page | 11 / 8 — for AT&T. K6R1016V1D. CMOS SRAM. TIMING WAVEFORM OF WRITE CYCLE(2). … |
| File Format / Size | PDF / 269 Kb |
| Document Language | English |
for AT&T. K6R1016V1D. CMOS SRAM. TIMING WAVEFORM OF WRITE CYCLE(2). Address. UB, LB. Data in. Data out
Model Line for this Datasheet
Text Version of Document
for AT&T K6R1016V1D CMOS SRAM TIMING WAVEFORM OF WRITE CYCLE(2)
(OE =Low fixed) tWC
Address
tAW tWR(5) tCW(3)
CS
tBW
UB, LB
tAS(4) tWP1(2)
WE
tDW tDH High-Z
Data in
Valid Data tWHZ(6) tOW (10) (9) High-Z
Data out TIMING WAVEFORM OF WRITE CYCLE(3)
(CS=Controlled) tWC
Address
tAW tWR(5) tCW(3)
CS
tBW
UB, LB
tAS(4) tWP(2)
WE
tDW tDH High-Z High-Z
Data in
Valid Data tLZ tWHZ(6) High-Z High-Z(8)
Data out Revision 3.0
- 8 -
June 2002
(OE =Low fixed) tWC
Address
tAW tWR(5) tCW(3)
CS
tBW
UB, LB
tAS(4) tWP1(2)
WE
tDW tDH High-Z
Data in
Valid Data tWHZ(6) tOW (10) (9) High-Z
Data out TIMING WAVEFORM OF WRITE CYCLE(3)
(CS=Controlled) tWC
Address
tAW tWR(5) tCW(3)
CS
tBW
UB, LB
tAS(4) tWP(2)
WE
tDW tDH High-Z High-Z
Data in
Valid Data tLZ tWHZ(6) High-Z High-Z(8)
Data out Revision 3.0
- 8 -
June 2002
