Datasheet ADA4350 (Analog Devices) - 9

Data Sheet ADA4350 5 V FET INPUT AMPLIFIER
TA = 25°C, +VS = 5 V, −VS = 0 V, RL = 1 kΩ, unless otherwise specified.
Table 6. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth G = −5, VOUT = 100 mV p-p 25 MHz G = −5, VOUT = 1 V p-p 24 MHz Gain Bandwidth Product 175 MHz Slew Rate VOUT = 2 V step, 10% to 90% 56 V/µs Settling Time to 0.1% G = −5, VOUT = 2 V step 60 ns NOISE/HARMONIC PERFORMANCE Harmonic Distortion (HD2/HD3) f = 100 kHz, VOUT = 1 V p-p, G = −5 −113/−117 dBc f = 1 MHz, VOUT = 1 V p-p, G = −5 −82/−83 dBc Input Voltage Noise f = 10 Hz 92 nV/√Hz f = 100 kHz 4.4 nV/√Hz DC PERFORMANCE Input Offset Voltage 25 80 µV Input Offset Voltage Drift From −40°C to +85°C 0.1 1.5 µV/°C From 25°C to 85°C 0.05 1 µV/°C Input Bias Current At 25°C ±0.35 ±1.6 pA At 85°C ±8.5 ±30 pA Input Bias Offset Current At 25°C ±0.25 ±1.25 pA At 85°C ±0.4 pA Open-Loop Gain VOUT = 1.5 V to 3.5 V 98 102 dB INPUT CHARACTERISTICS Input Resistance Common mode 100 GΩ Input Capacitance Common mode 2 pF Differential mode 3 pF Input Common-Mode Voltage Range CMRR > 80 dB 0.5 3.8 V CMRR > 68 dB 0 3.9 V Common-Mode Rejection Ratio VCM = ± 0.5V 88 94 dB OUTPUT CHARACTERISTICS Output Overdrive Recovery Time VOUT = VS ± 10%, positive/negative 60/50 ns Output Voltage Swing G = +21, RF = 1 kΩ, RL open measured at FBx 1.15 to 3.46 0.86 to 3.66 V G = +21, RF = 100 kΩ, RL open measured at FBx 0.27 to 4.80 0.08 to 4.87 V Linear Output Current VOUT = 1 V p-p, 60 dB SFDR 10 mA rms Short-Circuit Current Sinking/sourcing 32/38 mA POWER SUPPLY Operating Range 3.3 12 V Positive Power Supply Rejection Ratio 90 100 dB Negative Power Supply Rejection Ratio 86 100 dB Rev. B | Page 9 of 37 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ±5 V FULL SYSTEM ±5 V FET INPUT AMPLIFIER ±5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS ±5 V ADC DRIVER 5 V FULL SYSTEM 5 V FET INPUT AMPLIFIER 5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS 5 V ADC DRIVER TIMING SPECIFICATIONS Timing Diagrams for Serial Mode ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISITICS FULL SYSTEM FET INPUT AMPLIFIER ADC DRIVER TEST CIRCUITS THEORY OF OPERATION KELVIN SWITCHING TECHNIQUES APPLICATIONS INFORMATION CONFIGURING THE ADA4350 SELECTING THE TRANSIMPEDANCE GAIN PATHS MANUALLY OR THROUGH THE PARALLEL INTERFACE SELECTING THE TRANSIMPEDANCE GAIN PATHS THROUGH THE SPI INTERFACE (SERIAL MODE) SPICE MODEL TRANSIMPEDANCE AMPLIFIER DESIGN THEORY TRANSIMPEDANCE GAIN AMPLIFIER PERFORMANCE THE EFFECT OF LOW FEEDBACK RESISTOR RFx USING THE T NETWORK TO IMPLEMENT LARGE FEEDBACK RESISTOR VALUES OUTLINE DIMENSIONS ORDERING GUIDE