Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 10
Manufacturer | Analog Devices |
Description | Dual, Low Noise, 1 GHz FastFET Op Amplifier |
Pages / Page | 31 / 10 — ADA4817-1. /ADA4817-2. Data Sheet. ADA4817-2. TOP VIEW. (Not to Scale). … |
Revision | G |
File Format / Size | PDF / 632 Kb |
Document Language | English |
ADA4817-1. /ADA4817-2. Data Sheet. ADA4817-2. TOP VIEW. (Not to Scale). –IN1 1. 12 –VS1. +IN1 2. 11 NIC. NIC 3. 10 +IN2. –IN2
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Text Version of Document
ADA4817-1 /ADA4817-2 Data Sheet ADA4817-2 TOP VIEW (Not to Scale) T1 S1 B1 D1 F P +V OU 16 15 14 13 –IN1 1 12 –VS1 +IN1 2 11 NIC NIC 3 10 +IN2 –V 4 9 S2 –IN2 5 6 7 8 T2 S2 D2 B2 P F OU +V NOTES 1. NIC = NO INTERNAL CONNECTION.
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2. EXPOSED PAD. CAN BE CONNECTED TO GND, –VS PLANE, OR LEFT FLOATING.
07756- Figure 7. ADA4817-2 Pin Configuration (16-Lead LFCSP)
Table 7. ADA4817-2 Pin Function Descriptions (16-Lead LFCSP) Pin No. Mnemonic Description
1 −IN1 Inverting Input 1. 2 +IN1 Noninverting Input 1. 3, 11 NIC No Internal Connection. 4 −VS2 Negative Supply 2. 5 OUT2 Output 2. 6 +VS2 Positive Supply 2. 7 PD2 Power-Down 2. Do not leave floating. 8 FB2 Feedback Pin 2. 9 −IN2 Inverting Input 2. 10 +IN2 Noninverting Input 2. 12 −VS1 Negative Supply 1. 13 OUT1 Output 1. 14 +VS1 Positive Supply 1. 15 PD1 Power-Down 1. Do not leave floating. 16 FB1 Feedback Pin 1. EPAD Exposed Pad. Can be connected to GND, −VS plane, or left floating. Rev. G | Page 10 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE