Datasheet AD8000 (Analog Devices) - 5

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Data Sheet AD8000 ABSOLUTE MAXIMUM RATINGS
2  V V  V
Table 3.
P  V  I   – D   S OUT OUT S S  
Parameter Rating
2 R R  L  L Supply Voltage 12.6 V Consider the RMS output voltages. If RL is referenced to −VS, as Power Dissipation See Figure 4 in single-supply operation, the total drive power is VS × IOUT. If Common-Mode Input Voltage Range −VS − 0.7 V to +VS + 0.7 V the rms signal levels are indeterminate, consider the worst case, Differential Input Voltage VS when VOUT = VS/4 for RL to midsupply. Storage Temperature Range −65°C to +125°C 2 Operating Temperature Range −40°C to +125°C V / 4 P  V  I  D     S S S Lead Temperature (Soldering, 10 sec) 300°C RL Junction Temperature 150°C In single-supply operation with RL referenced to −VS, worst case Stresses at or above those listed under Absolute Maximum Ratings is VOUT = VS/2. may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any Airflow increases heat dissipation, effectively reducing θJA. Also, other conditions above those indicated in the operational section of more metal directly in contact with the package leads and exposed this specification is not implied. Operation beyond the maximum paddle from metal traces, through holes, ground, and power operating conditions for extended periods may affect product planes reduces θJA. reliability. Figure 4 shows the maximum safe power dissipation in the
THERMAL RESISTANCE
package vs. the ambient temperature for the exposed paddle SOIC (80°C/W) and the LFCSP (93°C/W) package on a JEDEC θJA is specified for the worst-case conditions, that is, θJA is speci- standard 4-layer board. θ fied for device soldered in the circuit board for surface-mount JA values are approximations. packages.
3.0 ) Table 4. Thermal Resistance 2.5 W ( Package Type θJA θJC Unit TION
8-Lead SOIC 80 30 °C/W
2.0
3 mm × 3 mm LFCSP 93 35 °C/W
ISSIPA SOIC D 1.5 R E LFCSP MAXIMUM POWER DISSIPATION POW 1.0 M U
The maximum safe power dissipation for the AD8000 is limited
XIM A 0.5
by the associated rise in junction temperature (T
M
J) on the die. At approximately 150C, which is the glass transition temperature,
0
05321-063 the properties of the plastic change. Even temporarily exceeding
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120
this temperature limit can change the stresses that the package
AMBIENT TEMPERATURE ( C)
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board exerts on the die, permanently shifting the parametric performance of the AD8000. Exceeding a junction temperature of 175C for
ESD CAUTION
an extended period of time can result in changes in silicon de- vices, potentially causing degradation or loss of functionality. The power dissipated in the package (PD) is the sum of the qui- escent power dissipation and the power dissipated in the die due to the AD8000 drive at the output. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (I S). PD = Quiescent Power + (Total Drive Power − Load Power) Rev. C | Page 5 of 17 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS WITH ±5 V SUPPLY SPECIFICATIONS WITH +5 V SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS INFORMATION CIRCUIT CONFIGURATIONS VIDEO LINE DRIVER LOW DISTORTION PINOUT EXPOSED PADDLE PRINTED CIRCUIT BOARD LAYOUT SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING OUTLINE DIMENSIONS ORDERING GUIDE