Datasheet AD8045 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | 3 nV/√Hz Ultralow Distortion, High Speed Op Amp |
| Pages / Page | 24 / 4 — AD8045. Data Sheet. SPECIFICATIONS WITH +5 V SUPPLY. Table 2. Parameter. … |
| Revision | C |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
AD8045. Data Sheet. SPECIFICATIONS WITH +5 V SUPPLY. Table 2. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit
Model Line for this Datasheet
Text Version of Document
link to page 14
AD8045 Data Sheet SPECIFICATIONS WITH +5 V SUPPLY
TA = 25°C, G = +1, RS = 100 Ω, RL = 1 kΩ to midsupply, unless otherwise noted. Exposed paddle must be floating or connected to −VS.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE –3 dB Bandwidth G = +1, VOUT = 0.2 V p-p 900 MHz G = +1, VOUT = 2 V p-p 160 200 MHz G = +2, VOUT = 0.2 V p-p 320 395 MHz Bandwidth for 0.1 dB Flatness G = +2, VOUT = 2 V p-p, RL = 150 Ω 60 MHz Slew Rate G = +1, VOUT = 2 V step 480 1060 V/µs Settling Time to 0.1% G = +2, VOUT = 2 V step 10 ns NOISE/HARMONIC PERFORMANCE Harmonic Distortion (dBc) HD2/HD3 fC = 5 MHz, VOUT = 2 V p-p LFCSP −89/−83 dBc SOIC −92/−83 dBc fC = 20 MHz, VOUT = 2 V p-p LFCSP −81/−70 dBc SOIC −83/−70 dBc fC = 70 MHz, VOUT = 2 V p-p LFCSP −57/−46 dBc SOIC −57/−46 dBc Input Voltage Noise f = 100 kHz 3 nV/√Hz Input Current Noise f = 100 kHz 3 pA/√Hz Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.01 % Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.01 Degrees DC PERFORMANCE Input Offset Voltage 0.5 1.4 mV Input Offset Voltage Drift See Figure 54 7 µV/°C Input Bias Current 2 6.6 µA Input Bias Current Drift 7 nA/°C Input Bias Offset Current 0.2 1.3 µA Open-Loop Gain VOUT = 2 V to 3 V 61 63 dB INPUT CHARACTERISTICS Input Resistance Common-mode/differential 3/0.9 MΩ Input Capacitance Common-mode 1.3 pF Input Common-Mode Voltage Range 1.2 to 3.8 V Common-Mode Rejection VCM = 2 V to 3 V −78 −94 dB OUTPUT CHARACTERISTICS Output Overdrive Recovery Time VIN = −0.5 V to +3 V, G = +2 10 ns Output Voltage Swing RL = 1 kΩ 1.2 to 3.8 1.1 to 4.0 V RL = 100 Ω 1.3 to 3.7 1.2 to 3.8 V Output Current 55 mA Short-Circuit Current Sinking/sourcing 70/140 mA Capacitive Load Drive 30% overshoot, G = +2 15 pF POWER SUPPLY Operating Range 3.3 5 12 V Quiescent Current 15 18 mA Positive Power Supply Rejection +VS = +5 V to +6 V, −VS = 0 V −65 −67 dB Negative Power Supply Rejection +VS = +5 V, −VS = 0 V to −1 V −70 −73 dB Rev. C | Page 4 of 24 Document Outline Features Applications Connection Diagrams General Description Table of Contents Revision History Specifications with ±5 V Supply Specifications with +5 V Supply Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Circuit Configurations Wideband Operation Theory of Operation Frequency Response DC Errors Output Noise Applications Information Low Distortion Pinout High Speed ADC Driver 90 MHz Active Low-Pass Filter (LPF) Printed Circuit Board Layout Signal Routing Power Supply Bypassing Grounding Exposed Paddle Driving Capacitive Loads Outline Dimensions Ordering Guide
AD8045 Data Sheet SPECIFICATIONS WITH +5 V SUPPLY
TA = 25°C, G = +1, RS = 100 Ω, RL = 1 kΩ to midsupply, unless otherwise noted. Exposed paddle must be floating or connected to −VS.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE –3 dB Bandwidth G = +1, VOUT = 0.2 V p-p 900 MHz G = +1, VOUT = 2 V p-p 160 200 MHz G = +2, VOUT = 0.2 V p-p 320 395 MHz Bandwidth for 0.1 dB Flatness G = +2, VOUT = 2 V p-p, RL = 150 Ω 60 MHz Slew Rate G = +1, VOUT = 2 V step 480 1060 V/µs Settling Time to 0.1% G = +2, VOUT = 2 V step 10 ns NOISE/HARMONIC PERFORMANCE Harmonic Distortion (dBc) HD2/HD3 fC = 5 MHz, VOUT = 2 V p-p LFCSP −89/−83 dBc SOIC −92/−83 dBc fC = 20 MHz, VOUT = 2 V p-p LFCSP −81/−70 dBc SOIC −83/−70 dBc fC = 70 MHz, VOUT = 2 V p-p LFCSP −57/−46 dBc SOIC −57/−46 dBc Input Voltage Noise f = 100 kHz 3 nV/√Hz Input Current Noise f = 100 kHz 3 pA/√Hz Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.01 % Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.01 Degrees DC PERFORMANCE Input Offset Voltage 0.5 1.4 mV Input Offset Voltage Drift See Figure 54 7 µV/°C Input Bias Current 2 6.6 µA Input Bias Current Drift 7 nA/°C Input Bias Offset Current 0.2 1.3 µA Open-Loop Gain VOUT = 2 V to 3 V 61 63 dB INPUT CHARACTERISTICS Input Resistance Common-mode/differential 3/0.9 MΩ Input Capacitance Common-mode 1.3 pF Input Common-Mode Voltage Range 1.2 to 3.8 V Common-Mode Rejection VCM = 2 V to 3 V −78 −94 dB OUTPUT CHARACTERISTICS Output Overdrive Recovery Time VIN = −0.5 V to +3 V, G = +2 10 ns Output Voltage Swing RL = 1 kΩ 1.2 to 3.8 1.1 to 4.0 V RL = 100 Ω 1.3 to 3.7 1.2 to 3.8 V Output Current 55 mA Short-Circuit Current Sinking/sourcing 70/140 mA Capacitive Load Drive 30% overshoot, G = +2 15 pF POWER SUPPLY Operating Range 3.3 5 12 V Quiescent Current 15 18 mA Positive Power Supply Rejection +VS = +5 V to +6 V, −VS = 0 V −65 −67 dB Negative Power Supply Rejection +VS = +5 V, −VS = 0 V to −1 V −70 −73 dB Rev. C | Page 4 of 24 Document Outline Features Applications Connection Diagrams General Description Table of Contents Revision History Specifications with ±5 V Supply Specifications with +5 V Supply Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Circuit Configurations Wideband Operation Theory of Operation Frequency Response DC Errors Output Noise Applications Information Low Distortion Pinout High Speed ADC Driver 90 MHz Active Low-Pass Filter (LPF) Printed Circuit Board Layout Signal Routing Power Supply Bypassing Grounding Exposed Paddle Driving Capacitive Loads Outline Dimensions Ordering Guide
