Datasheet ADP1870, ADP1871 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Synchronous Buck Controller with Constant On-Time and Valley Current Mode |
| Pages / Page | 44 / 5 — Data Sheet. ADP1870/ADP1871. ABSOLUTE MAXIMUM RATINGS. Table 2. THERMAL … |
| Revision | B |
| File Format / Size | PDF / 1.8 Mb |
| Document Language | English |
Data Sheet. ADP1870/ADP1871. ABSOLUTE MAXIMUM RATINGS. Table 2. THERMAL RESISTANCE. Parameter. Rating. Table 3. Thermal Resistance
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Data Sheet ADP1870/ADP1871 ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating
θJA is specified for the worst-case conditions, that is, a device VREG to PGND, GND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN to PGND −0.3 V to +28 V FB, COMP/EN to GND −0.3 V to (VREG + 0.3 V)
Table 3. Thermal Resistance
DRVL to PGND −0.3 V to (VREG + 0.3 V)
Package Type θ 1 JA Unit
SW to PGND −2.0 V to +28 V θJA (10-Lead MSOP) BST to SW −0.6 V to (VREG + 0.3 V) 2-Layer Board 213.1 °C/W BST to PGND −0.3 V to 28 V 4- Layer Board 171.7 °C/W DRVH to SW −0.3 V to VREG θJA (10-Lead LFCSP) PGND to GND ±0.3 V 4- Layer Board 40 °C/W θJA (10-Lead MSOP) 1 θ 2-Layer Board 213.1°C/W JA is specified for the worst-case conditions; that is, θJA is specified for the device soldered in a circuit board for surface-mount packages. 4-Layer Board 171.7°C/W θJA (10-Lead LFCSP)
BOUNDARY CONDITION
4-Layer Board 40°C/W Operating Junction Temperature −40°C to +125°C In determining the values given in Table 2 and Table 3, natural Range convection was used to transfer heat to a 4-layer evaluation board. Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020
ESD CAUTION
Maximum Soldering Lead 300°C Temperature (10 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to PGND. Rev. B | Page 5 of 44 Document Outline Features Applications General Description Typical Applications Circuit Revision History Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics ADP1870/ADP1871 Block Diagram Theory of Operation Startup Soft Start Precision Enable Circuitry Undervoltage Lockout On-Board Low Dropout Regulator Thermal Shutdown Programming Resistor (RES) Detect Circuit Valley Current-Limit Setting Hiccup Mode During Short Circuit Synchronous Rectifier Power Saving Mode (PSM) Version (ADP1871) Timer Operation Pseudo-Fixed Frequency Applications Information Feedback Resistor Divider Inductor Selection Output Ripple Voltage (ΔVRR) Output Capacitor Selection Compensation Network Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (GM) Current-Sense Loop Gain (GCS) Crossover Frequency Efficiency Considerations Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss Input Capacitor Selection Thermal Considerations Design Example Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations External Component Recommendations Layout Considerations IC Section (Left Side of Evaluation Board) Power Section Differential Sensing Typical Applications Circuits 15 A, 300 kHz High Current Application Circuit 5.5 V Input, 600 kHz Application Circuit 300 kHz High Current Application Circuit Outline Dimensions Ordering Guide
Data Sheet ADP1870/ADP1871 ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating
θJA is specified for the worst-case conditions, that is, a device VREG to PGND, GND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN to PGND −0.3 V to +28 V FB, COMP/EN to GND −0.3 V to (VREG + 0.3 V)
Table 3. Thermal Resistance
DRVL to PGND −0.3 V to (VREG + 0.3 V)
Package Type θ 1 JA Unit
SW to PGND −2.0 V to +28 V θJA (10-Lead MSOP) BST to SW −0.6 V to (VREG + 0.3 V) 2-Layer Board 213.1 °C/W BST to PGND −0.3 V to 28 V 4- Layer Board 171.7 °C/W DRVH to SW −0.3 V to VREG θJA (10-Lead LFCSP) PGND to GND ±0.3 V 4- Layer Board 40 °C/W θJA (10-Lead MSOP) 1 θ 2-Layer Board 213.1°C/W JA is specified for the worst-case conditions; that is, θJA is specified for the device soldered in a circuit board for surface-mount packages. 4-Layer Board 171.7°C/W θJA (10-Lead LFCSP)
BOUNDARY CONDITION
4-Layer Board 40°C/W Operating Junction Temperature −40°C to +125°C In determining the values given in Table 2 and Table 3, natural Range convection was used to transfer heat to a 4-layer evaluation board. Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020
ESD CAUTION
Maximum Soldering Lead 300°C Temperature (10 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to PGND. Rev. B | Page 5 of 44 Document Outline Features Applications General Description Typical Applications Circuit Revision History Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics ADP1870/ADP1871 Block Diagram Theory of Operation Startup Soft Start Precision Enable Circuitry Undervoltage Lockout On-Board Low Dropout Regulator Thermal Shutdown Programming Resistor (RES) Detect Circuit Valley Current-Limit Setting Hiccup Mode During Short Circuit Synchronous Rectifier Power Saving Mode (PSM) Version (ADP1871) Timer Operation Pseudo-Fixed Frequency Applications Information Feedback Resistor Divider Inductor Selection Output Ripple Voltage (ΔVRR) Output Capacitor Selection Compensation Network Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (GM) Current-Sense Loop Gain (GCS) Crossover Frequency Efficiency Considerations Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss Input Capacitor Selection Thermal Considerations Design Example Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations External Component Recommendations Layout Considerations IC Section (Left Side of Evaluation Board) Power Section Differential Sensing Typical Applications Circuits 15 A, 300 kHz High Current Application Circuit 5.5 V Input, 600 kHz Application Circuit 300 kHz High Current Application Circuit Outline Dimensions Ordering Guide
