Datasheet ADP1822 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | PWM, Step-Down DC-to-DC Controller with Margining and Tracking |
| Pages / Page | 24 / 8 — ADP1822. Data Sheet. Pin No. Mnemonic. Description |
| Revision | D |
| File Format / Size | PDF / 365 Kb |
| Document Language | English |
ADP1822. Data Sheet. Pin No. Mnemonic. Description
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ADP1822 Data Sheet Pin No. Mnemonic Description
17 MDN Margin Down Input. Connect a resistor from MDN to the output voltage to set the low margining voltage. See the Setting the Voltage Margin section. 18 MUP Margin Up Input. Connect a resistor from MUP to GND to set the high margining voltage. See the Setting the Voltage Margin section. 19 VCC Internal Power Supply Input. VCC powers the internal circuitry. Bypass VCC to GND with 0.1 µF or greater capacitor connected as close as possible to the IC. 20 CSL Low-Side Current Sense Input. Connect CSL to SW through a resistor to set the current limit. See the Setting the Current Limit section. 21 PGND Power Ground. Connect GND to PGND at a single point as close as possible to the IC. 22 DL Low-Side Gate Driver Output. Connect DL to the gate of the low-side N-channel MOSFET synchronous rectifier. The DL voltage swings between PGND and PVCC. 23 PVCC Internal Gate Driver Power Supply Input. PVCC powers the low-side gate driver DL. Bypass PVCC to PGND with 1 µF or greater capacitor connected as close as possible to the IC. 24 NC No Connection. Not internally connected. Rev. D | Page 8 of 24 Document Outline Features Applications General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Current-Limit Scheme Output Voltage Margining Output Voltage Tracking Soft Start High-Side Driver (BST and DH) Low-Side Driver (DL) Input Voltage Range Setting the Output Voltage Switching Frequency Control Compensation Power-Good Indicator Shutdown Control Application Information Selecting the Input Capacitor Output LC Filter Selecting the MOSFETS Setting the Current Limit Feedback Voltage Divider Setting the Voltage Margin Compensating the Regulator Compensation Using the ESR Zero Compensation Using Feed-Forward Compensation Using Both the ESR and Feed-Forward Zeros Setting the Soft Start Period Synchronizing the Converter Setting the Output Voltage Tracking Application Circuits Outline Dimensions Ordering Guide
ADP1822 Data Sheet Pin No. Mnemonic Description
17 MDN Margin Down Input. Connect a resistor from MDN to the output voltage to set the low margining voltage. See the Setting the Voltage Margin section. 18 MUP Margin Up Input. Connect a resistor from MUP to GND to set the high margining voltage. See the Setting the Voltage Margin section. 19 VCC Internal Power Supply Input. VCC powers the internal circuitry. Bypass VCC to GND with 0.1 µF or greater capacitor connected as close as possible to the IC. 20 CSL Low-Side Current Sense Input. Connect CSL to SW through a resistor to set the current limit. See the Setting the Current Limit section. 21 PGND Power Ground. Connect GND to PGND at a single point as close as possible to the IC. 22 DL Low-Side Gate Driver Output. Connect DL to the gate of the low-side N-channel MOSFET synchronous rectifier. The DL voltage swings between PGND and PVCC. 23 PVCC Internal Gate Driver Power Supply Input. PVCC powers the low-side gate driver DL. Bypass PVCC to PGND with 1 µF or greater capacitor connected as close as possible to the IC. 24 NC No Connection. Not internally connected. Rev. D | Page 8 of 24 Document Outline Features Applications General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Current-Limit Scheme Output Voltage Margining Output Voltage Tracking Soft Start High-Side Driver (BST and DH) Low-Side Driver (DL) Input Voltage Range Setting the Output Voltage Switching Frequency Control Compensation Power-Good Indicator Shutdown Control Application Information Selecting the Input Capacitor Output LC Filter Selecting the MOSFETS Setting the Current Limit Feedback Voltage Divider Setting the Voltage Margin Compensating the Regulator Compensation Using the ESR Zero Compensation Using Feed-Forward Compensation Using Both the ESR and Feed-Forward Zeros Setting the Soft Start Period Synchronizing the Converter Setting the Output Voltage Tracking Application Circuits Outline Dimensions Ordering Guide
