Datasheet STDRIVE101 (STMicroelectronics) - 2
| Manufacturer | STMicroelectronics |
| Description | Triple half-bridge gate driver |
| Pages / Page | 32 / 2 — STDRIVE101. Block diagram. Figure 1. STDRIVE101 block diagram. DS13472. … |
| File Format / Size | PDF / 899 Kb |
| Document Language | English |
STDRIVE101. Block diagram. Figure 1. STDRIVE101 block diagram. DS13472. Rev 1. page 2/32
Model Line for this Datasheet
Text Version of Document
STDRIVE101 Block diagram 1 Block diagram Figure 1. STDRIVE101 block diagram
12V VM + REG12 VS VCC 12 V LDO Reg STBY VSCREF SCREF + VCC VBOOT Half-bridge 1 BOOT1 VDSth GHS1 DT/MODE HS + OUT1 IN3/INH3 - VCC IN2/INH2 +- GLS1 IN1/INH1 LS +VDSth logic EN3/INL3 BOOT2 GHS2 EN2/INL2 dead-time OUT2 Half-bridge 2 M EN1/INL1 Decoding and GLS2 VDD BOOT3 GHS3 nFAULT OUT3 Half-bridge 3 GLS3 CP + VREF - GND
DS13472
-
Rev 1 page 2/32
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Electrical data 2.1 Absolute maximum ratings 2.2 Recommended operating conditions 2.3 Thermal data 2.4 Electrical sensitivity characteristics 3 Electrical characteristics 4 Pin description 5 Device description 5.1 Gate drivers’ characteristics 5.2 12 V LDO linear regulator 5.2.1 Bootstrap section 5.2.1.1 Power-up and wake-up 5.2.1.2 Charging time and external bootstrap diodes 5.2.2 Externally provided gate driver’s supply voltage 5.3 Control logic 5.3.1 Deadtime 5.4 Standby mode 5.5 Undervoltage protection 5.6 VDS monitoring protection 5.7 Overcurrent comparator 5.8 Thermal protection 6 ESD protection strategy 7 Application example 8 Package information 9 Ordering information Revision history Contents List of tables List of figures
12V VM + REG12 VS VCC 12 V LDO Reg STBY VSCREF SCREF + VCC VBOOT Half-bridge 1 BOOT1 VDSth GHS1 DT/MODE HS + OUT1 IN3/INH3 - VCC IN2/INH2 +- GLS1 IN1/INH1 LS +VDSth logic EN3/INL3 BOOT2 GHS2 EN2/INL2 dead-time OUT2 Half-bridge 2 M EN1/INL1 Decoding and GLS2 VDD BOOT3 GHS3 nFAULT OUT3 Half-bridge 3 GLS3 CP + VREF - GND
DS13472
-
Rev 1 page 2/32
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Electrical data 2.1 Absolute maximum ratings 2.2 Recommended operating conditions 2.3 Thermal data 2.4 Electrical sensitivity characteristics 3 Electrical characteristics 4 Pin description 5 Device description 5.1 Gate drivers’ characteristics 5.2 12 V LDO linear regulator 5.2.1 Bootstrap section 5.2.1.1 Power-up and wake-up 5.2.1.2 Charging time and external bootstrap diodes 5.2.2 Externally provided gate driver’s supply voltage 5.3 Control logic 5.3.1 Deadtime 5.4 Standby mode 5.5 Undervoltage protection 5.6 VDS monitoring protection 5.7 Overcurrent comparator 5.8 Thermal protection 6 ESD protection strategy 7 Application example 8 Package information 9 Ordering information Revision history Contents List of tables List of figures
