Datasheet MASTERGAN2 (STMicroelectronics) - 10
| Manufacturer | STMicroelectronics |
| Description | High power density 600V Half bridge driver with two enhancement mode GaN HEMT |
| Pages / Page | 29 / 10 — MASTERGAN2. Device characterization values. Symbol. Parameter. Test … |
| File Format / Size | PDF / 1.6 Mb |
| Document Language | English |
MASTERGAN2. Device characterization values. Symbol. Parameter. Test condition. Min. Typ. Max. Unit. Figure 3. Switching time definition
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MASTERGAN2 Device characterization values Symbol Parameter Test condition Min Typ Max Unit
VS = 400 V, VGS = 6 V, Eoff Turn-off switching losses 2.5 µJ ID = 3.2 A, See Figure 3 1. t(on) and t(off) include the propagation delay time of the internal driver 2. tC(on) and tC(off) are the switching times of GaN transistor itself under the internally given gate driving conditions
Figure 3. Switching time definition
VDS ID ID VDS 10%I 10%V D DS 10%ID 10%VDS t(ON) t V C(OFF) IN V t IN (OFF) tC(ON) (a) turn-on (b) turn-off
Figure 4. Typ I Figure 5. Typ I D_LS vs. VDS at TJ=25°C D_LS vs. VDS at TJ=125°C
30 12 T 6V T J=125°C 5V J=25°C 6V 25 10 4V 5V 20 8 4V (A) 15 (A) 6 I D I D 10 4 5 2 0 0 0 1 2 3 4 5 0 1 2 3 4 5 VDS (V) VDS (V)
DS13597
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Rev 1 page 10/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures
MASTERGAN2 Device characterization values Symbol Parameter Test condition Min Typ Max Unit
VS = 400 V, VGS = 6 V, Eoff Turn-off switching losses 2.5 µJ ID = 3.2 A, See Figure 3 1. t(on) and t(off) include the propagation delay time of the internal driver 2. tC(on) and tC(off) are the switching times of GaN transistor itself under the internally given gate driving conditions
Figure 3. Switching time definition
VDS ID ID VDS 10%I 10%V D DS 10%ID 10%VDS t(ON) t V C(OFF) IN V t IN (OFF) tC(ON) (a) turn-on (b) turn-off
Figure 4. Typ I Figure 5. Typ I D_LS vs. VDS at TJ=25°C D_LS vs. VDS at TJ=125°C
30 12 T 6V T J=125°C 5V J=25°C 6V 25 10 4V 5V 20 8 4V (A) 15 (A) 6 I D I D 10 4 5 2 0 0 0 1 2 3 4 5 0 1 2 3 4 5 VDS (V) VDS (V)
DS13597
-
Rev 1 page 10/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures
