Datasheet HMC637BPM5E (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | GaAs, pHEMT, MMIC, Single Positive Supply, DC to 7.5 GHz, 1 W Power Amplifier |
| Pages / Page | 21 / 3 — Data Sheet. HMC637BPM5E. SPECIFICATIONS FREQUENCY RANGE = DC TO 7.5 GHz. … |
| Revision | A |
| File Format / Size | PDF / 691 Kb |
| Document Language | English |
Data Sheet. HMC637BPM5E. SPECIFICATIONS FREQUENCY RANGE = DC TO 7.5 GHz. Table 1. Parameter. Symbol Min. Typ. Max. Unit
Model Line for this Datasheet
Text Version of Document
Data Sheet HMC637BPM5E SPECIFICATIONS FREQUENCY RANGE = DC TO 7.5 GHz
TA = 25°C, VDD = 12 V, IDQ = 345 mA, VGG1 = GND, VGG2 = open, for nominal self biased operation, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE DC 7.5 GHz GAIN 12.5 15.5 dB Gain Flatness ±0.5 dB Gain Variation over Temperature ±0.015 dB/°C NOISE FIGURE 3.5 dB RETURN LOSS Input 15 dB Output 15 dB OUTPUT Output Power for 1 dB Compression P1dB 25 28 dBm Saturated Output Power PSAT 30.5 dBm Output Third-Order Intercept IP3 39 dBm Measurement taken at output power (POUT)/ tone = 10 dBm SUPPLY Current IDQ 345 mA For the external bias condition, adjust the gate bias voltage (VGG1) between −2 V up to +0.5 V to achieve the desired quiescent current (IDQ) Voltage VDD 8 12 13 V Rev. A | Page 3 of 21 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS FREQUENCY RANGE = DC TO 7.5 GHz ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTIC THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT EVALUATION PCB BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE
TA = 25°C, VDD = 12 V, IDQ = 345 mA, VGG1 = GND, VGG2 = open, for nominal self biased operation, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE DC 7.5 GHz GAIN 12.5 15.5 dB Gain Flatness ±0.5 dB Gain Variation over Temperature ±0.015 dB/°C NOISE FIGURE 3.5 dB RETURN LOSS Input 15 dB Output 15 dB OUTPUT Output Power for 1 dB Compression P1dB 25 28 dBm Saturated Output Power PSAT 30.5 dBm Output Third-Order Intercept IP3 39 dBm Measurement taken at output power (POUT)/ tone = 10 dBm SUPPLY Current IDQ 345 mA For the external bias condition, adjust the gate bias voltage (VGG1) between −2 V up to +0.5 V to achieve the desired quiescent current (IDQ) Voltage VDD 8 12 13 V Rev. A | Page 3 of 21 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS FREQUENCY RANGE = DC TO 7.5 GHz ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTIC THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT EVALUATION PCB BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE
