Data SheetADRF5515ABSOLUTE MAXIMUM RATINGS Table 2.THERMAL RESISTANCEParameterRating Thermal performance is directly linked to printed circuit board Supply Voltage (VDD) (PCB) design and operation environment. Careful attention to VDD1-CHA, VDD1-CHB, VDD2-CHA, 7 V PCB thermal design is required. and VDD2-CHB SWVDD-CHAB θ 5.4 V JC is the junction to case bottom (channel to package bottom) thermal resistance. Digital Control Input Voltage SWCTRL-CHAB −0.3 V to VDD+ 0.3 V Table 3. Thermal Resistance BP-CHA, BP-CHB, and PD-CHAB −0.3 V to VDD+ 0.3 V Package TypeθJCUnit Digital Control Input Current CP-40-15 BP-CHA, BP-CHB, PD-CHAB, and 20 mA High Gain Mode 30 °C/W SWCTRL-CHAB Low Gain Mode 36 °C/W RF Input Power Power-Down Mode 6 °C/W Transmit Input Power (LTE Peak, 53 dBm 9 dB PAR) Receive Input Power (LTE Peak, 25 dBm ELECTROSTATIC DISCHARGE (ESD) RATINGS 9 dB PAR) The fol owing ESD information is provided for handling of Temperature ESD sensitive devices in an ESD protected area only. Storage Range −65°C to +150°C Human body model (HBM) per ANSI/ESDA/JEDEC JS-001. Reflow 260°C Charged device model (CDM) per ANSI/ESDA/JEDEC JS-002. Stresses at or above those listed under Absolute Maximum ESD Ratings for ADRF5515 Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these Table 4. ADRF5515, 40-Lead LFCSP or any other conditions above those indicated in the ESD ModelWithstand ThresholdClass operational section of this specification is not implied. HBM 1 kV 1C Operation beyond the maximum operating conditions for CDM 750 V extended periods may affect product reliability. ESD CAUTION Rev. 0 | Page 5 of 15 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings for ADRF5515 ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVE OPERATION, HIGH GAIN MODE RECEIVE OPERATION, LOW GAIN MODE TRANSMIT OPERATION THEORY OF OPERATION SIGNAL PATH SELECT Transmit Operation Receive Operation BIASING SEQUENCE APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE