Datasheet ADL5519 (Analog Devices) - 8

ManufacturerAnalog Devices
Description1 MHz to 10 GHz, 62 dB Dual Log Detector/Controller
Pages / Page39 / 8 — ADL5519. Data Sheet. Parameter. Conditions. Min. Typ. Max. Unit
RevisionC
File Format / SizePDF / 3.1 Mb
Document LanguageEnglish

ADL5519. Data Sheet. Parameter. Conditions. Min. Typ. Max. Unit

ADL5519 Data Sheet Parameter Conditions Min Typ Max Unit

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ADL5519 Data Sheet Parameter Conditions Min Typ Max Unit
SETPOINT INTERFACE VSTA, VSTB Nominal Input Range Input level = 0 dBm, measurement mode 0.38 V Input level = –50 dBm, measurement mode 1.6 V Input Resistance Controller mode, sourcing 50 μA 40 kΩ DIFFERENCE LEVEL ADJUST VLVL (Pin 6) Input Voltage OUTP, OUTN = FBKA, FBKB VP − 1 V Input Resistance OUTP, OUTN = FBKA, FBKB 100 kΩ TEMPERATURE COMPENSATION ADJA, ADJB Input Resistance ADJA, ADJB = 0.9 V, sourcing 50 μA 13 kΩ Disable Threshold Voltage ADJA, ADJB = open VP − 0.4 V VOLTAGE REFERENCE VREF (Pin 5) Output Voltage 1.15 V Temperature Sensitivity −40°C < TA < +25°C; relative TA = 25°C +26 μV/°C 25°C < TA < 85°C; relative TA = 25°C −26 μV/°C Current Limit Source/Sink 3/3 mA TEMPERATURE REFERENCE TEMP (Pin 19) Output Voltage 1.36 V Temperature Sensitivity −40°C < TA < +125°C 4.5 mV/°C Current Limit Source/Sink 4/50 mA/μA POWER-DOWN INTERFACE PWDN (Pin 28) Logic Level to Enable Logic low enables 0 V Logic Level to Disable Logic high disables VP − 0.2 V Input Current Logic high PWDN = 5 V 2 μA Logic low PWDN = 0 V 20 μA Enable Time PWDN low to OUTA, OUTB at 100% final value, 0.4 μs CLPA, CLPB = open, RF in = −10 dBm Disable Time PWDN high to OUTA, OUTB at 10% final value, 0.25 μs CLPA, CLPB = open, RF in = 0 dBm POWER INTERFACE VPSA, VPSB, VPSR Supply Voltage 3.3 5.5 V Quiescent Current 60 mA vs. Temperature −40°C ≤ TA ≤ +85°C 147 μA/°C Disable Current ADJA, ADJB = PWDN = VP <1 mA 1 Slope and intercept are determined by calculating the best-fit line between the power levels of −40 dBm and −10 dBm at the specified input frequency. Rev. C | Page 8 of 39 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION USING THE ADL5519 BASIC CONNECTIONS INPUT SIGNAL COUPLING TEMPERATURE SENSOR INTERFACE VREF INTERFACE POWER-DOWN INTERFACE SETPOINT INTERFACE—VSTA, VSTB OUTPUT INTERFACE—OUTA, OUTB DIFFERENCE OUTPUT—OUTP, OUTN DESCRIPTION OF CHARACTERIZATION BASIS FOR ERROR CALCULATIONS DEVICE CALIBRATION ADJUSTING ACCURACY THROUGH CHOICE OF CALIBRATION POINTS TEMPERATURE COMPENSATION ADJUSTMENT ALTERING THE SLOPE CHANNEL ISOLATION OUTPUT FILTERING PACKAGE CONSIDERATIONS OPERATION ABOVE 8 GHz APPLICATIONS INFORMATION MEASUREMENT MODE CONTROLLER MODE AUTOMATIC GAIN CONTROL GAIN-STABLE TRANSMITTER/RECEIVER MEASURING VSWR EVALUATION BOARD CONFIGURATION OPTIONS EVALUATION BOARD SCHEMATIC AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE