Datasheet AD8302 (Analog Devices) - 4

ManufacturerAnalog Devices
DescriptionLF–2.7 GHz RF/IF Gain and Phase Detector
Pages / Page23 / 4 — AD8302. ABSOLUTE MAXIMUM RATINGS1. PIN CONFIGURATION. COMM 1. 14 MFLT. …
RevisionB
File Format / SizePDF / 590 Kb
Document LanguageEnglish

AD8302. ABSOLUTE MAXIMUM RATINGS1. PIN CONFIGURATION. COMM 1. 14 MFLT. INPA 2. 13 VMAG. OFSA 3. 12 MSET. TOP VIEW. VPOS 4. 11 VREF

AD8302 ABSOLUTE MAXIMUM RATINGS1 PIN CONFIGURATION COMM 1 14 MFLT INPA 2 13 VMAG OFSA 3 12 MSET TOP VIEW VPOS 4 11 VREF

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AD8302 ABSOLUTE MAXIMUM RATINGS1 PIN CONFIGURATION
Supply Voltage VS . 5.5 V PSET, MSET Voltage . VS + 0.3 V
COMM 1 14 MFLT
INPA, INPB Maximum Input . –3 dBV Equivalent Power Re. 50 Ω . 10 dBm
INPA 2 13 VMAG
θ 2
OFSA 3 AD8302 12 MSET
JA . 150°C/W Maximum Junction Temperature . 125°C
TOP VIEW VPOS 4 11 VREF (Not to Scale)
Operating Temperature Range . –40°C to +85°C
OFSB 5 10 PSET
Storage Temperature Range . –65°C to +150°C
INPB 6 9 VPHS
Lead Temperature Range (Soldering 60 sec) . 300°C
COMM 7 8 PFLT
NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2JEDEC 1S Standard (2-layer) board data.
PIN FUNCTION DESCRIPTIONS Equivalent Pin No. Mnemonic Function Circuit
1, 7 COMM Device Common. Connect to low impedance ground. 2 INPA High Input Impedance to Channel A. Must be ac-coupled. Circuit A 3 OFSA A capacitor to ground at this pin sets the offset compensation filter corner Circuit A and provides input decoupling. 4 VPOS Voltage Supply (VS), 2.7 V to 5.5 V 5 OFSB A capacitor to ground at this pin sets the offset compensation filter corner Circuit A and provides input decoupling. 6 INPB Input to Channel B. Same structure as INPA. Circuit A 8 PFLT Low Pass Filter Terminal for the Phase Output Circuit E 9 VPHS Single-Ended Output Proportional to the Phase Difference between INPA Circuit B and INPB. 10 PSET Feedback Pin for Scaling of VPHS Output Voltage in Measurement Mode. Circuit D Apply a setpoint voltage for controller mode. 11 VREF Internally Generated Reference Voltage (1.8 V Nominal) Circuit C 12 MSET Feedback Pin for Scaling of VMAG Output Voltage Measurement Mode. Circuit D Accepts a set point voltage in controller mode. 13 VMAG Single-Ended Output. Output voltage proportional to the decibel ratio of signals applied to INPA and INPB. Circuit B 14 MFLT Low Pass Filter Terminal for the Magnitude Output Circuit E
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although
WARNING!
the AD8302 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
ESD SENSITIVE DEVICE
recommended to avoid performance degradation or loss of functionality. –4– REV. B Document Outline FEATURES PRODUCT DESCRIPTION FUNCTIONAL BLOCK DIAGRAM AD8302-SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS CAUTION Equivalent Circuits Typical Performance Characteristics GENERAL DESCRIPTION AND THEORY Basic Theory Structure BASIC CONNECTIONS Measurement Mode Interfacing to the Input Channels Dynamic Range Cross Modulation of Magnitude and Phase Modifying the Slope and Center Point Comparator and Controller Modes APPLICATIONS Measuring Amplifier Gain and Compression Reflectometer CHARACTERIZATION SETUPS AND METHODS Gain Phase OUTLINE DIMENSIONS Ordering Guide Revision History