Datasheet AD5749 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Industrial Current Out Driver, Single-Supply, 55 V Maximum Supply, Programmable Ranges |
| Pages / Page | 28 / 3 — Data Sheet. AD5749. SPECIFICATIONS. Table 2. Parameter1 Min. Typ. Max. … |
| Revision | E |
| File Format / Size | PDF / 399 Kb |
| Document Language | English |
Data Sheet. AD5749. SPECIFICATIONS. Table 2. Parameter1 Min. Typ. Max. Unit. Test. Conditions/Comments
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Data Sheet AD5749 SPECIFICATIONS
AVDD = 12 V (± 10%) to 55 V (maximum), DVCC = 2.7 V to 5.5 V, GND = 0 V. RLOAD = 300 Ω. All specifications TMIN to TMAX, unless otherwise noted.
Table 2. Parameter1 Min Typ Max Unit Test Conditions/Comments
INPUT VOLTAGE RANGE 0 to 4.096 V Output unloaded Input Leakage Current −1 +1 μA REFERENCE INPUT Reference Input Voltage 4.096 V External reference must be exactly as stated; otherwise, accuracy errors show up as error in output Input Leakage Current −1 +1 μA CURRENT OUTPUT Output Current Ranges 0 24 mA 4 20 mA Output Current Overranges2 0 24.5 mA See Detailed Description of Features section 3.92 20.4 mA See Detailed Description of Features section ACCURACY (INTERNAL RSET) Total Unadjusted Error (TUE) A Version2 −0.5 +0.5 % FSR −0.3 ±0.15 +0.3 % FSR TA = 25°C Relative Accuracy (INL) −0.02 ±0.01 +0.02 % FSR Offset Error −16 +16 μA −10 +5 +10 μA TA = 25°C Offset Error TC2 ±3 ppm FSR/°C Dead Band on Output, RTI 8 14 mV Referred to 4.096 V input range Gain Error −0.2 +0.2 % FSR −0.125 ±0.02 +0.125 % FSR TA = 25°C Gain TC2 ±10 ppm FSR/°C Full-Scale Error −0.2 +0.2 % FSR −0.125 ±0.02 +0.125 % FSR TA = 25°C Full-Scale TC2 ±4 ppm FSR/°C ACCURACY (EXTERNAL RSET) Total Unadjusted Error (TUE) A Version2 −0.3 +0.3 % FSR −0.1 ±0.02 +0.1 % FSR TA = 25°C Relative Accuracy (INL) −0.02 ±0.01 +0.02 % FSR Offset Error −14 +14 μA −11 +5 +11 TA = 25°C Offset Error TC2 ±2 ppm FSR/°C Dead Band on Output, RTI 8 +14 mV Referred to 4.096 V input range Gain Error −0.08 +0.08 % FSR −0.07 ±0.02 +0.07 % FSR TA = 25°C Gain TC2 ±1 ppm FSR/°C Full-Scale Error −0.1 +0.1 % FSR −0.07 ±0.02 +0.07 % FSR TA = 25°C Full-Scale TC2 ±2 ppm FSR/°C Rev. E | Page 3 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY TIMING CHARACTERISTICS Timing Diagrams ESD CAUTION SOFTWARE MODE CURRENT OUTPUT ARCHITECTURE DRIVING INDUCTIVE LOADS POWER-ON STATE OF THE AD5749 DEFAULT REGISTERS AT POWER-ON RESET FUNCTION OUTEN SOFTWARE CONTROL Input Shift Register Status Bit Read Operation HARDWARE CONTROL TRANSFER FUNCTION OUTPUT FAULT ALERT—SOFTWARE MODE OUTPUT FAULT ALERT—HARDWARE MODE ASYNCHRONOUS CLEAR (CLEAR) EXTERNAL CURRENT SETTING RESISTOR PROGRAMMABLE OVERRANGE MODES PACKET ERROR CHECKING TRANSIENT VOLTAGE PROTECTION THERMAL CONSIDERATIONS LAYOUT GUIDELINES GALVANICALLY ISOLATED INTERFACE MICROPROCESSOR INTERFACING ORDERING GUIDE
Data Sheet AD5749 SPECIFICATIONS
AVDD = 12 V (± 10%) to 55 V (maximum), DVCC = 2.7 V to 5.5 V, GND = 0 V. RLOAD = 300 Ω. All specifications TMIN to TMAX, unless otherwise noted.
Table 2. Parameter1 Min Typ Max Unit Test Conditions/Comments
INPUT VOLTAGE RANGE 0 to 4.096 V Output unloaded Input Leakage Current −1 +1 μA REFERENCE INPUT Reference Input Voltage 4.096 V External reference must be exactly as stated; otherwise, accuracy errors show up as error in output Input Leakage Current −1 +1 μA CURRENT OUTPUT Output Current Ranges 0 24 mA 4 20 mA Output Current Overranges2 0 24.5 mA See Detailed Description of Features section 3.92 20.4 mA See Detailed Description of Features section ACCURACY (INTERNAL RSET) Total Unadjusted Error (TUE) A Version2 −0.5 +0.5 % FSR −0.3 ±0.15 +0.3 % FSR TA = 25°C Relative Accuracy (INL) −0.02 ±0.01 +0.02 % FSR Offset Error −16 +16 μA −10 +5 +10 μA TA = 25°C Offset Error TC2 ±3 ppm FSR/°C Dead Band on Output, RTI 8 14 mV Referred to 4.096 V input range Gain Error −0.2 +0.2 % FSR −0.125 ±0.02 +0.125 % FSR TA = 25°C Gain TC2 ±10 ppm FSR/°C Full-Scale Error −0.2 +0.2 % FSR −0.125 ±0.02 +0.125 % FSR TA = 25°C Full-Scale TC2 ±4 ppm FSR/°C ACCURACY (EXTERNAL RSET) Total Unadjusted Error (TUE) A Version2 −0.3 +0.3 % FSR −0.1 ±0.02 +0.1 % FSR TA = 25°C Relative Accuracy (INL) −0.02 ±0.01 +0.02 % FSR Offset Error −14 +14 μA −11 +5 +11 TA = 25°C Offset Error TC2 ±2 ppm FSR/°C Dead Band on Output, RTI 8 +14 mV Referred to 4.096 V input range Gain Error −0.08 +0.08 % FSR −0.07 ±0.02 +0.07 % FSR TA = 25°C Gain TC2 ±1 ppm FSR/°C Full-Scale Error −0.1 +0.1 % FSR −0.07 ±0.02 +0.07 % FSR TA = 25°C Full-Scale TC2 ±2 ppm FSR/°C Rev. E | Page 3 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY TIMING CHARACTERISTICS Timing Diagrams ESD CAUTION SOFTWARE MODE CURRENT OUTPUT ARCHITECTURE DRIVING INDUCTIVE LOADS POWER-ON STATE OF THE AD5749 DEFAULT REGISTERS AT POWER-ON RESET FUNCTION OUTEN SOFTWARE CONTROL Input Shift Register Status Bit Read Operation HARDWARE CONTROL TRANSFER FUNCTION OUTPUT FAULT ALERT—SOFTWARE MODE OUTPUT FAULT ALERT—HARDWARE MODE ASYNCHRONOUS CLEAR (CLEAR) EXTERNAL CURRENT SETTING RESISTOR PROGRAMMABLE OVERRANGE MODES PACKET ERROR CHECKING TRANSIENT VOLTAGE PROTECTION THERMAL CONSIDERATIONS LAYOUT GUIDELINES GALVANICALLY ISOLATED INTERFACE MICROPROCESSOR INTERFACING ORDERING GUIDE
