Datasheet ADP5023 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | Dual 3 MHz, 800 mA Buck Regulator with One 300 mA LDO |
| Pages / Page | 28 / 6 — ADP5023. Data Sheet. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table … |
| Revision | F |
| File Format / Size | PDF / 773 Kb |
| Document Language | English |
ADP5023. Data Sheet. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 6. Parameter Rating. Table 7. Thermal Resistance
Model Line for this Datasheet
Text Version of Document
link to page 22 link to page 22
ADP5023 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 6. Parameter Rating
θJA is specified for the worst-case conditions, that is, a device AVIN to AGND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN1, VIN2 to AVIN −0.3 V to +0.3 V
Table 7. Thermal Resistance
PGND1, PGND2 to AGND −0.3 V to +0.3 V
Package Type θJA θJC Unit
VIN3, VOUT1, VOUT2, FB1, FB2, FB3, −0.3 V to (AVIN + 0.3 V) 24-Lead, 0.5 mm pitch LFCSP 35 3 °C/W EN1, EN2, EN3, MODE to AGND VOUT3 to AGND −0.3 V to (VIN3 + 0.3 V) SW1 to PGND1 −0.3 V to (VIN1 + 0.3 V)
ESD CAUTION
SW2 to PGND2 −0.3 V to (VIN2 + 0.3 V) Storage Temperature Range −65°C to +150°C Operating Junction Temperature −40°C to +125°C Range Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. For detailed information on power dissipation, see the Power Dissipation and Thermal Considerations section. Rev. F | Page 6 of 28 Document Outline Features Applications General Description Typical Application Circuit Table of Contents Revision History Specifications General Specifications BUCK1 and BUCK2 Specifications LDO Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Management Unit Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK1 and BUCK2 Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Oscillator/Phasing of Inductor Switching Short-Circuit Protection Soft Start Current Limit 100% Duty Operation Active Pull-Downs LDO Applications Information Buck External Component Selection Feedback Resistors Inductor Output Capacitor Input Capacitor LDO External Component Selection Feedback Resistors Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Power Dissipation and Thermal Considerations Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature PCB Layout Guidelines Typical Application Schematics Bill of Materials Outline Dimensions Ordering Guide
ADP5023 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 6. Parameter Rating
θJA is specified for the worst-case conditions, that is, a device AVIN to AGND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN1, VIN2 to AVIN −0.3 V to +0.3 V
Table 7. Thermal Resistance
PGND1, PGND2 to AGND −0.3 V to +0.3 V
Package Type θJA θJC Unit
VIN3, VOUT1, VOUT2, FB1, FB2, FB3, −0.3 V to (AVIN + 0.3 V) 24-Lead, 0.5 mm pitch LFCSP 35 3 °C/W EN1, EN2, EN3, MODE to AGND VOUT3 to AGND −0.3 V to (VIN3 + 0.3 V) SW1 to PGND1 −0.3 V to (VIN1 + 0.3 V)
ESD CAUTION
SW2 to PGND2 −0.3 V to (VIN2 + 0.3 V) Storage Temperature Range −65°C to +150°C Operating Junction Temperature −40°C to +125°C Range Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. For detailed information on power dissipation, see the Power Dissipation and Thermal Considerations section. Rev. F | Page 6 of 28 Document Outline Features Applications General Description Typical Application Circuit Table of Contents Revision History Specifications General Specifications BUCK1 and BUCK2 Specifications LDO Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Management Unit Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK1 and BUCK2 Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Oscillator/Phasing of Inductor Switching Short-Circuit Protection Soft Start Current Limit 100% Duty Operation Active Pull-Downs LDO Applications Information Buck External Component Selection Feedback Resistors Inductor Output Capacitor Input Capacitor LDO External Component Selection Feedback Resistors Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Power Dissipation and Thermal Considerations Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature PCB Layout Guidelines Typical Application Schematics Bill of Materials Outline Dimensions Ordering Guide
