link to page 9 TSV7721, TSV7722, TSV7723Electrical characteristicsTable 5. Electrical characteristics at VCC+ = 1.8 V, with VCC- = 0 V, Vicm = 0.7 V, T = 25°C, and OUT pin connected to VCC /2 through RL = 10 kΩ (unless otherwise specified)SymbolParameterConditionsMin.Typ.Max.UnitDC Performance T = 25°C ±50 ±250 Vio Input offset voltage (Vicm = 0 V) µV -40°C < T < 125°C ±650 ∆Vio/∆T Input offset voltage drift (Vicm = 0 V) -40°C < T < 125°C ±4 µV/°C T = 25°C 1 Iib Input bias current (VOUT = VCC/2) pA -40°C < T < 125°C 40 T = 25°C 1 Iio Input offset current (VOUT = VCC/2) pA -40°C < T < 125°C 15 Common-mode rejection ratio T = 25°C 72 93 CMR1 20.log(∆Vicm/∆Vio), Vicm = 0 V to dB -40°C < T < 125°C 68 VCC- 1.1 V, RL > 1 MΩ Common-mode rejection ratio T = 25°C 70 CMR2 20.log(∆Vicm/∆Vio), dB -40°C < T < 125°C 52 Vicm = - 0.1 V to VCC- 1.1 V, RL > 1 MΩ Large signal voltage gain V T = 25°C 101 122 A OUT = 0.3 V to VD dB (VCC- 0.3 V) -40°C < T < 125°C 97 High level output voltage T = 25°C 15 VOH (VOH = VCC - VOUT) -40°C < T < 125°C 25 mV T = 25°C 15 VOL Low level output voltage -40°C < T < 125°C 25 T = 25°C 35 42 Isink (VOUT = VCC) -40°C < T < 125°C 20 IOUT mA T = 25°C 20 32 Isource (VOUT = 0 V) -40°C < T < 125°C 10 Supply current (per channel, T = 25°C 1.7 2.2 ICC mA VOUT = VCC / 2, RL > 1 MΩ) -40°C < T < 125°C 2.5 AC Performance GBW Gain bandwidth product 14 21 MHz Fu Unity gain frequency 18 Φm Phase margin CL = 47 pF 41 degrees Gm Gain margin 8 dB SR Slew rate (1) 7.6 11 V/µs f = 1 kHz 13 en Equivalent input noise voltage nV/√Hz f = 10 kHz 7 Channel separation CS f = 1 kHz 120 dB (for TSV7722 and TSV7723) SHDN characteristics (TSV7723 only, SHDN active low) Supply current per channel in shutdown T = 25°C 2.5 50 ICC nA mode VOUT = VCC / 2, RL > 1 MΩ, -40°C < T < 85°C 450 DS13614 - Rev 1page 8/33 Document Outline Features Applications Description 1 Pin connections 2 Absolute maximum ratings and operating conditions 3 Electrical characteristics 4 Typical performance characteristics 5 Application information 5.1 Operating voltages 5.2 Input offset voltage drift over the temperature 5.3 Unused channel 5.4 EMI rejection 5.5 Maximum power dissipation 5.6 Capacitive load and stability 5.7 Resistor values for high speed op amp design 5.8 Settling time 5.9 PCB layout recommendations 5.10 Decoupling capacitor 5.11 Macro model 6 Typical applications 6.1 Low-side current sensing 6.2 Photodiode transimpedance amplification 7 Package information 7.1 SOT23-5 package information 7.2 DFN8 2x2 package information 7.3 MiniSO8 package information 7.4 SO-8 package information 7.5 MiniSO10 package information 8 Ordering information Revision history